Heterojunction field effect type semiconductor device having high gate turn-on voltage and low on-resistance and its manufacturing method
AssigneeNEC Compound Semiconductor Devices, Ltd.
InventorYasunori Bito
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Abstract
In a heterojunction field effect type semiconductor device, a channel layer is formed over a GaAs substrate, and a first semiconductor layer including no aluminum is formed over the channel layer. First and second cap layers of a first conductivity type are formed on the first semiconductor layer, to create a recess on the first semiconductor layer. First and second ohmic electrodes are formed on the first and second cap layers, respectively. A second semiconductor layer of a second conductivity type is formed on the first semiconductor layer within the recess, and the semiconductor layer is isolated from the first and second cap layers. A gate electrode is formed on the second semiconductor layer.
Claims35
A heterojunction field effect type semiconductor device, comprising:
- a GaAs substrate;
- a channel layer formed over said GaAs substrate;
- a first semiconductor layer including no aluminum formed over said channel layer;
- first and second cap layers of a first conductivity type formed on said first semiconductor layer, said first and second cap layers creating a first recess on said first semiconductor layer;
- first and second ohmic electrodes formed on said first and second cap layers, respectively;
- a second semiconductor layer of a second conductivity type formed on said first semiconductor layer within said first recess, said second semiconductor layer being isolated from said first and second cap layers;
- and
- a gate electrode formed on said second semiconductor layer.
A method for manufacturing a heterojunction field effect type semiconductor device, comprising:
- growing at least a channel layer, a first semiconductor layer including no aluminum, a wide recess etching stopper layer of a first conductivity type, and a cap layer of said first conductivity type over a GaAs substrate by a first epitaxial growth process;
- selectively removing said cap layer by using said wide recess etching stopper layer as a stopper to create a first recess within said cap layer;
- depositing an insulating layer on the entire surface after said first recess is created;
- perforating said insulating layer to expose said first semiconductor layer;
- growing a second semiconductor layer of a second conductivity type by a second epitaxial growth process, so that said second semiconductor layer is buried in said first recess and contacts said first semiconductor layer;
- forming a gate electrode on said second semiconductor layer;
- and
- forming ohmic electrodes on said cap layer.
Dependencies are inferred from the claim text.