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OwnerNaoto Iizuka, Takashi Nihonmatsu +2inventors
InventorsNaoto Iizuka, Takashi Nihonmatsu, Masahiko Yoshida, Seiichi Miyazaki
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The present invention relates to a method for producing a silicon wafer, wherein the method comprises at least a lapping process by use of loose abrasive grains and an etching process by use of an alkaline etching solution, lapping is performed in the lapping process by use of abrasive grains having a maximum grain diameter of 21 μm or less and an average grain diameter of 8.5 μm or less serving as the loose abrasive grains, and after that, etching is performed in the etching process by use of an alkaline solution having a concentration of an alkaline component of 50% by weight or more serving as the alkaline etching solution, and relates to a silicon wafer produced by the production method. Thus, there can be provided a method for producing a silicon wafer which can prevent degradation of surface roughness of the wafer and flatness of the whole wafer, and a silicon wafer produced by the method.
A method for producing a silicon wafer, wherein the method comprises at least a lapping process by use of loose abrasive grains and an etching process by use of an alkaline etching solution, lapping is performed in the lapping process by use of abrasive grains having a maximum grain diameter of 21 μm or less and an average grain diameter of 8.5 μm or less serving as the loose abrasive grains, and after that, etching is performed in the etching process by use of an alkaline solution having a concentration of an alkaline component of 50% by weight or more serving as the alkaline etching solution.
A silicon wafer, wherein both sides of the wafer are etched surfaces, and in a peripheral portion of the wafer except a region within 1 mm from a peripheral end of the wafer on the etched surfaces, an absolute value of a minimum value (sag) of a thickness difference of a shape in the peripheral portion of the wafer against a reference surface obtained from a thickness displacement of the wafer surface in a central region of the wafer is 0.2 μm or less.
A silicon wafer, wherein the silicon wafer has an etched surface on at least one main surface side, an plain orientation of the silicon wafer is (100), the etched surface has etch pits forming square-shaped openings with four sides along a crystal orientation <110>, and an average size of the etch pits is 6 μm or less.
A silicon wafer, wherein the silicon wafer has an etched surface on at least one main surface side, a conductivity type is p-type, resistivity is 0.01 Ω·cm or less, a plane orientation of the silicon wafer is (100), the etched surface has etch pits forming square-shaped openings with four sides along a crystal orientation <110>, and an average size of the etch pits is 7 μm or less.
Dependencies are inferred from the claim text.