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US 2004/0071040 A1Published application
Memory module and memory system
AssigneeElpida Memory, Inc.
InventorsSeiji Funaba, Yoji Nishio, Kayoko Shibata
Life of this patent
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AssigneeElpida Memory, Inc.
InventorsSeiji Funaba, Yoji Nishio, Kayoko Shibata
Estimating the term…
A memory module has a plurality of DRAMs (115), which share a bus line, on the front surface and the back surface of a board. The bus line is connected through a via hole (113) from a terminal (111) to one end of a strip line (112), and the other end of the strip line is connected to a strip line in the other layer through a via hole (119) provided for looping back the line. A termination resistor (120), provided near a termination voltage terminal (VTT), is connected to the looped-back strip line in the other layer through a via hole. The DRAM terminals are connected to the strip line each through a via hole. This memory module is mounted on a motherboard, on which a memory controller is provided, through a connector. The effective characteristic impedance of the bus line is matched with the characteristic impedance of the line in the motherboard.
A memory module comprising a plurality of memory devices, which share a bus line, on a board,
A memory module comprising a board on which a plurality of memory devices, which share a bus line, are mounted on at least one of a front surface and a back surface,
A memory module comprising a board on which a plurality of memory devices, which share a bus line, are mounted on a front surface and a back surface,
A memory module comprising a board on which a plurality of memory devices, which share a bus line, are mounted on a front surface and a back surface,
A memory module comprising a board on which a plurality of memory devices, which share a bus line, are mounted on a front surface and a back surface,
A memory module comprising a board on which a plurality of memory devices, which share a bus line, are mounted on a front surface and a back surface,
A memory module wherein a memory module board on which a plurality of memory devices, which share a bus line, are mounted on a front surface and a back surface is divided into at least two boards that are interconnected by inter-board connection means,
A memory module having a plurality of memory devices, which share a bus line, on a front surface and a back surface of a board,
A memory system having at least one memory module each of which has a plurality of memory devices on a front surface and/or a back surface of a board and has a bus line at least part of which is wired using a strip line embedded between a power supply layer and a ground layer in said board and whose end is terminated by a termination circuit provided on said board,
Dependencies are inferred from the claim text.