Method and apparatus for controlling the rate at which instructions are executed by a microprocessor system
OwnerSudarshan Kadambiinventor
Life of this patent
Estimating the term…
Abstract
One embodiment of the present invention provides a system that facilitates controlling the rate at which instructions are executed by a microprocessor. The system starts by receiving a signal indicating the existence of a throttling condition. In response to the throttling condition, the system reduces the rate at which instructions are executed by the microprocessor. In a variation on this embodiment, the throttling condition can include a processor idle state, a processor overheating state, or a power over-consumption state.
Claims30
A method for throttling a microprocessor comprising:
- receiving a signal indicating the existence of a throttling condition;
- and
- in response to the throttling condition, performing the throttling by reducing the rate at which instructions are executed by the microprocessor.
A computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for throttling a microprocessor comprising:
- receiving a signal indicating the existence of a throttling condition;
- and
- in response to the throttling condition, performing the throttling by reducing the rate at which instructions are executed by the microprocessor.
An apparatus for throttling a microprocessor comprising:
- a receiving mechanism configured to receive a signal indicating the existence of a throttling condition;
- and
- a throttling mechanism configured to perform the throttling by reducing the rate at which instructions are executed by the microprocessor.
Dependencies are inferred from the claim text.