Configurable memory controller for advanced high performance bus system

A memory controller device selectively operating from either a first set of input control signals or a second set of input control signals, said memory controller comprising:

• a first set of inputs receiving said first set of input control signals;
• a second set of inputs receiving said second set of input control signals;
• an external memory interface operative for connection to an external memory including an address bus and a data bus;
• a signal converter device connected to said first set of inputs for converting signals in said first set of control signals to said second set of control signals;
• a mode input indicating selection of a first bus mode or a second bus mode;
• and
• a multiplexer having a first input connected to receive said converted signals from said signal converter device, a second input connected to said second set of inputs, a control input connected to said mode input and an output supplying said external memory controller, said multiplexer selecting for output either said first input or said second input dependent upon said bus mode indicated by said mode input.