Reduction in source-drain resistance of semiconductor device

A semiconductor device manufacture method comprising steps of:

• (a) forming a gate electrode in each of a plurality of active regions defined in a silicon substrate, said gate electrode traversing the active region, and forming extension regions of source/drain in the active region on both sides of said gate electrode;
• (b) depositing first and second insulating films having different etching characteristics on the silicon substrate, said first and second insulating films covering side walls of said gate electrode, and anisotropically etching said first and second insulating films to form a side wall spacer on the side walls of each gate electrode;
• (c) selectively etching said first insulating film of the side wall spacer to form a retraction portion retracted from a surface of said second insulating film on a side surface and an upper surface of the side wall spacer;
• (d) implanting ions into the silicon substrate by using the side wall spacer as a mask to form source/drain regions in the silicon substrate;
• and
• (f) depositing a third insulating film on the silicon substrate, the third insulating film entering the retraction portion and burying the retraction portion.

A semiconductor device comprising:

• a silicon substrate having a plurality of active regions;
• an insulated gate electrode formed on said silicon substrate and traversing a corresponding one of the active regions;
• a side wall spacer formed on side walls of said insulated gate electrode and made of a lamination of first and second insulating films having different etching characteristics, said side wall spacer having retraction portions at the end face of the first insulating film retracted from a surface of the second insulating film;
• and
• a silicide region formed on a surface of said silicon substrate under the retraction portion and a thicker silicide region formed on the surface of said silicon substrate in an outer area of said silicide region.