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US 2004/0063284 A1Published application
Scalable dielectric
AssigneeTexas Instruments Incorporated
InventorsCetin Kaya, Men Chee Chen, Kemal Tamer San
Life of this patent
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Abstract
An interpoly dielectric is formed using only a single layer of oxide and a single layer of nitride to allow a reduction in thickness. The nitride is thermally grown on silicon in a nitrogen environment to maintain a high quality layer, while the oxide is deposited by LPCVD.
Claims15
An integrated circuit structure, comprising:
- a first layer of silicon and a second layer of silicon, said first and second layers of silicon being separated, in at least some areas, only by a dielectric layer;
- wherein said dielectric layer consists only of a single layer of oxide and a single layer of nitride.
A FLASH memory integrated circuit structure, comprising:
- a floating gate;
- a control gate at least partially overlying said floating gate;
- wherein said floating gate and said control gate are separated solely by a dielectric layer consisting of a single layer of oxide and a single layer of nitride.
A fabrication method, comprising the steps of:
- forming a first layer of silicon at least partially overlying a substantially monolithic body of semiconductor material;
- forming a layer of nitride at least partially overlying said first layer of silicon;
- forming a layer of oxide at least partially overlying said first layer of silicon;
- after said steps of forming said layer of nitride and forming said layer of oxide, but prior to performing any other steps, forming a second layer of silicon at least partially overlying said layer of oxide, said layer of nitride, and said first layer of silicon;
- wherein only two layers are present between said first layer of silicon and said second layer of silicon.
2 more elements
Dependencies are inferred from the claim text.