Sample-and-hold amplifier circuit and pipelined A/D and D/A converters using sample hold amplification circuit
AssigneeSharp Kabushiki Kaisha
InventorYoshihisa Fujimoto
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AssigneeSharp Kabushiki Kaisha
InventorYoshihisa Fujimoto
Estimating the term…
A sample-and-hold amplifier circuit of the present invention has a switch, provided between an operational amplifier stage and an inverting amplifier stage, for connecting or cutting off the connection of the operational amplifier stage and the inverting amplifier stage. During the first operation phase (φ1), the first and second switches are switched to the φ1 side, the third switch is conductive, and the switch for connecting or cutting off the connection is nonconductive. This allows to carry out the sampling so that the first and second capacitors are charged by predetermined electrical charges. During the second operation phase (φ2), the first and second switches are switched to the φ2 side, the third switch is nonconductive, and the switch for connecting or cutting off the connection is conductive. This allows that the voltage thus sampled is subjected to the operational amplification. During the next first operation phase, the switch for connecting or cutting off the connection is nonconductive, thereby holding the voltage (VOUT), that has been subjected to the operational amplification, at the output terminal of the operational amplifier stage. This allows to provide a sample-and-hold amplifier circuit that can realize the low power consumption.
A sample-and-hold amplifier circuit, comprising:
A sample-and-hold amplifier circuit, comprising:
A pipelined A/D converter, comprising:
A pipelined A/D converter, comprising:
A pipelined D/A converter, comprising:
A pipelined D/A converter, comprising:
Dependencies are inferred from the claim text.