Amplifier power control circuit

An electrical circuit comprising:

• an amplifying transistor comprising a base terminal coupled to an input node;
• and
• a power control circuit, wherein the power control circuit comprises:
• a sense transistor comprising a base terminal and a collector terminal, wherein the base terminal is coupled to the base terminal of the amplifying transistor, the collector terminal is coupled to a ground via a capacitor, and the collector terminal is coupled to a reference voltage source via a first resistor;
• an error amplifier comprising a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is coupled to the collector of the sense transistor, the first input terminal is coupled to a control voltage source via a second resistor, and the output terminal of the first error amplifier is coupled to the input node;
• and
• a third resistor and a fourth resistor coupled in series between the reference voltage source and the ground, wherein the second input of the error amplifier is coupled to a node between the third and the fourth resistors, and wherein the ratio of the resistance of the first resistor to a resistance of the second resistor is about equal to the ratio of the resistance of the third resistor to a resistance of the fourth resistor.

An electrical circuit comprising:

• an amplifying transistor comprising a base terminal coupled to an input node;
• and
• a power control circuit, wherein the power control circuit comprises:
• a sense transistor comprising a base terminal and a collector terminal, wherein the base terminal is coupled to the base terminal of the amplifying transistor, the collector terminal is coupled to a ground via a capacitor, and the collector terminal is coupled to a reference voltage source via a first resistor;
• a first error amplifier comprising a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first error amplifier is coupled to the collector of the sense transistor, and the output terminal of the first error amplifier is coupled to the input node;
• a current source transistor comprising a base terminal, an emitter terminal, and a collector terminal, wherein the emitter terminal of the current source transistor is coupled to the ground via a second resistor, the collector terminal of the current source resistor is coupled to the reference voltage source via a third resistor, and the collector terminal of the current source transistor is coupled to the second input terminal of the first error amplifier;
• a second error amplifier comprising a first input terminal, a second input terminal, and an output terminal, wherein the output terminal of the second error amplifier is coupled to the base of the current source transistor, the first input terminal of the second error amplifier is coupled to the emitter of the current source transistor, and the second input terminal of the second error amplifier is coupled to a control voltage source.

A method for sensing and controlling the power of a signal output by an amplifying transistor, comprising the acts of:

• coupling a base terminal of a sense transistor to a base terminal of the amplifying transistor;
• creating a sense current in the sense transistor, wherein the sense current corresponds to an output current of the amplifying transistor, and wherein the sense current is sourced by a reference voltage source and a control voltage source;
• creating a divided voltage of a voltage output by the reference voltage source;
• and
• outputting a control signal to a base terminal of the amplifying transistor, wherein the control signal is associated with a difference between the divided voltage and a sense voltage, the sense voltage being associated with a DC portion of the sense current and with a power control voltage, and wherein the control signal controls the output current of the amplifying transistor.

An electrical circuit comprising:

• a plurality of amplifying transistors, wherein each unique amplifying transistor comprises a base terminal and a collector terminal, and wherein the collector terminals of each unique amplifying transistor are coupled together;
• and
• a power control circuit, wherein the power control circuit comprises:
• a plurality of sense transistors, wherein each unique sense transistor comprises a base terminal and a collector terminal, wherein the base terminal of each unique sense transistor is coupled to the base terminal of a unique corresponding amplifying transistor, and wherein the collector terminals of the sense transistors are coupled together;
• and
• an error amplifier circuit, wherein the error amplifier circuit is coupled to receive a sense voltage from the collector terminals of the sense transistors, and is coupled to output a bias control signal to the base terminals of the amplifying transistors.

A method for sensing and controlling the power of a signal output by a plurality of amplifying transistors, wherein each unique amplifying transistor comprises a base terminal and a collector terminal, and wherein the collector terminals of the amplifying transistors are coupled together, the method comprising the acts of:

• providing a plurality of sense transistors, wherein each unique sense transistor comprises a base terminal and a collector terminal;
• forming a plurality of sense and amplifying transistor pairs by coupling the base terminal of each unique sense transistor to the base terminal of an amplifying transistor;
• coupling the collector terminals of the sense transistors together;
• outputting a sense voltage from the coupled sense transistor collectors to an error amplifier circuit;
• and
• outputting a control signal from the error amplifier circuit to the base terminals of the amplifying transistors, wherein the control signal is associated with a difference between a power control voltage and the sense voltage, and wherein the control signal controls the output current of the amplifying transistors.