Dynamic software code instrumentation method and system

A method for monitoring software code being executed in a target system having a bus and cache, said method comprising the steps of:

• (a) searching a range of addresses within the software code to identify preamble and postamble instructions;
• (b) replacing the preamble instruction with a misalignment instruction;
• (c) replacing the postamble instruction with an other misalignment instruction;
• (d) inserting an exception routine into an exception vector table executable upon a branch from a faulted address, the exception routine having a cache-disabling instruction, an instruction to execute the instruction replaced from the faulted address, a branch instruction branching to an address of the software code subsequent to the faulted address, and a decoding instruction to indicate entry of a function when the address of the misalignment instruction is faulted and to indicate exit of a function when the address of the other misalignment instruction is faulted;
• and
• (e) executing the software code, wherein at least a portion of the software code will execute externally of the cache.

A system for monitoring software code being executed in a target having a bus and cache, said system comprising:

• an instruction locating module to search a range of addresses within the software code to identify a desired instruction;
• an instruction replacement module to replace the desired instruction with an exception-generating instruction;
• and
• a vector table instrumentation module to insert an exception routine into an exception vector table, the exception routine having a cache-disabling instruction and a branch instruction branching to an address of the software code disposed subsequent to the exception-generating instruction.

An article of manufacture for monitoring software code being executed in a target processor having a bus and cache, said article of manufacture comprising:

• a computer usable medium having a computer readable program code embodied therein, said computer usable medium having:
• computer readable program code for searching a range of addresses within the software code to identify a desired instruction;
• computer readable program code for replacing the desired instruction with an exception-generating instruction;
• and
• computer readable program code for inserting an exception routine into an exception vector table, the exception routine having a cache-disabling instruction and a branch instruction branching to an address of the software code disposed subsequent to the exception-generating instruction.

Computer readable program code for monitoring software code being executed in a target processor having a bus and cache, said computer readable program code comprising:

• computer readable program code for searching a range of addresses within the software code to identify a desired instruction;
• computer readable program code for replacing the desired instruction with an exception-generating instruction;
• and
• computer readable program code for inserting an exception routine into an exception vector table, the exception routine having a cache-disabling instruction and a branch instruction branching to an address of the software code disposed subsequent to the exception-generating instruction.