System abstraction layer, processor abstraction layer, and operating system error handling
AssigneeIntel Corporation
InventorsSuresh Marisetty, Main Ayyar, Nhon T. Quach, Bernard J. Lint
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AssigneeIntel Corporation
InventorsSuresh Marisetty, Main Ayyar, Nhon T. Quach, Bernard J. Lint
Estimating the term…
Systems and methods for error handling are disclosed. The systems and methods may be utilized for single or multiple processor computer systems to handle errors in a coordinated manner between hardware and any firmware or software layers. A computer system includes a non volatile memory and at least one processor. A firmware error handling routine is stored on the non volatile memory. The firmware error handling routine is for handling errors. Each of the at least one processors detects errors. Each processor executes the firmware error handling routine on detecting an error. The executed firmware error handling routine handles the error. The executed firmware error handling routine also logs error information to a log. The systems and methods provide for coordinated error handling that enhance error recovery, provide error containment and maintain system availability.
A computer system comprising:
A computer system comprising:
A computer system comprising:
A system for cooperative error handling comprising:
A system comprising:
A method for cooperative error handling in a computer system comprising:
A method for handling errors in a system comprising:
A method comprising:
A computer readable medium containing computer instructions for instructing a processor to perform a method for cooperatively handling errors comprising:
The computer readable medium containing computer instructions for instructing a processor to perform a method for cooperatively handling errors, further comprising:
Dependencies are inferred from the claim text.