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US 2004/0016945 A1Published application
P channel Rad Hard MOSFET with enhancement implant
AssigneeInternational Rectifier Corporation
InventorMilton J. Boden JR.
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AssigneeInternational Rectifier Corporation
InventorMilton J. Boden JR.
Estimating the term…
A P channel vertical conduction Rad Hard MOSFET has a plurality of closely spaced base strips which have respective sources to form invertible surface channels with the opposite sides of each of the stripes. A non-DMOS late gate oxide and overlying conductive polysilicon gate are formed after the source and base regions have been diffused. The base stripes are spaced by about 0.6 microns, and the polysilicon gate stripes are about 3.2 microns wide. A P type enhancement region is implanted through spaced narrow windows early in the process and are located in the JFET common conduction region which is later formed by and between the spaced base stripes. The device is a high voltage (greater than 25 volts) P channel device with very low gate capacitance and very low on resistance.
A Rad Hard MOSFET comprising a silicon wafer having a flat junction receiving region of one of the conductivity types;
The process of forming a Rad Hard MOSFET comprising the steps of implanting and diffusing a plurality of parallel spaced enhancement strips into the surface of a silicon wafer of one of the conductivity types;
Dependencies are inferred from the claim text.