Method of dividing a semiconductor integrated circuit pattern
OwnerChuen Huei Yang, Chien-Ming Wang +2inventors
InventorsChuen Huei Yang, Chien-Ming Wang, Chien-Wen Lai, Cheng-Shyan Tsay
Life of this patent
Estimating the term…
Abstract
A method of dividing a semiconductor integrated circuit pattern. The pattern has a plurality of cells with the same shape and a polygonal planar positioned between each cell, the polygonal planar has two parallel horizontal edges and a plurality of vertexes. The method includes depicting a division line to divide the polygonal planar positioned between each cell into a plurality of unit figures. The division line begins along a horizontal edge of the polygonal planar, and when meeting with a vertex, the division line extends a vertical line segment from the horizontal edge to another horizontal edge.
Claims9
A method of dividing a semiconductor integrated circuit pattern, the pattern comprising a plurality of cells with same shape and a polygonal planar positioned between each cell, the polygonal planar comprising two parallel horizontal edges and a plurality of vertexes, the method comprising:
- depicting a division line to divide the polygonal planar positioned between each cell into a plurality of unit figures, the division line beginning along a horizontal edge of the polygonal planar, and when meeting with a vertex, the division line extending a vertical line segment from the horizontal edge to another horizontal edge.
A method of dividing a semiconductor integrated circuit pattern used in a data conversion system, the pattern comprising a plurality of cells with same shape and a polygonal planar positioned between each cell, the polygonal planar comprising two parallel horizontal edges and a plurality of vertexes, the method comprising:
- depicting a division line to divide the polygonal planar positioned between each cell into a plurality of unit figures, the division line beginning along a horizontal edge of the polygonal planar, and when meeting with a vertex, the division line extending a vertical line segment from the horizontal edge to another horizontal edge;
- wherein the data conversion system converts the divided circuit pattern into input graphic data, so a writer can use the input graphic data for drawing the circuit pattern on a workpiece.
A method of dividing a semiconductor integrated circuit pattern, the pattern comprising a plurality of cells with same shape and a polygonal planar positioned between each cell, the polygonal planar being composed of a plurality of unit figures and the unit figures being arranged sequentially and horizontally, the method comprising:
- depicting a division line to divide the unit figures of the polygonal planar into at least two regions, and two adjacent unit figures being respectively divided into different regions.
Dependencies are inferred from the claim text.