Method of defining the dimensions of circuit elements by using spacer deposition techniques

A method of forming a gate electrode of a field effect transistor, the method comprising:

• providing a substrate having formed thereon a semiconductor layer covered by a gate insulation layer;
• depositing a layer of gate electrode material on said gate insulation layer;
• forming a sacrificial layer over said layer of gate electrode material;
• forming an opening in said sacrificial layer, said opening having a shape and dimensions that correspond to the gate electrode to be formed, wherein the dimensions of the opening exceed specific design dimensions of said gate electrode;
• conformally depositing a spacer layer over said opening to reduce the dimensions so as to substantially correspond to the specific design dimensions;
• filling said opening with a mask material;
• removing the spacer layer and the sacrificial layer to obtain an etch mask;
• and
• anisotropically etching the substrate using said etch mask to form the gate electrode, the dimensions of which are substantially determined by said etch mask.

A method of forming a microstructure element including an opening of a specified design size, the method comprising:

• providing a substrate having formed thereon a material layer in which the opening is to be formed;
• forming a sacrificial layer on said material layer;
• forming a mask opening having a size that exceeds said specified design size;
• conformally depositing a spacer layer over said mask opening to adjust the size to the specified design size;
• and
• forming said opening by anisotropically etching through said mask opening.

A method of forming differently sized microstructure elements, the method comprising:

• providing a substrate having formed thereon a material layer in which said microstructure elements are to be formed;
• forming a sacrificial layer on said material layer;
• forming a first opening and a second opening having different sizes;
• forming a first spacer layer over the first and second openings;
• and
• forming a second spacer layer over the second opening to obtain a first reduced size of the first opening and a second reduced size of the second opening, wherein the first reduced size and the second reduced size substantially correspond to design sizes of a first microstructure element and a second microstructure element.