Method and design for measuring SRAM array leakage macro (ALM)
AssigneeInternational Business Machines Corporation
InventorsMatthew J. Breitwisch, Jeffrey S. Brown, Randy W. Mann, Jeffery H. Oppold
Life of this patent
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Abstract
A method and structure for a test structure that has an array of cells connected together by conductive lines. The conductive lines connect the cells together as if they were a single cell. The conductive lines can include common word line; a common bit line; a common bit line complement line, a common N-well voltage line, a common interior ground line, a common interior voltage line, and/or a common ground line.
Claims18
A test structure comprising:
- an array of cells;
- and
- conductive lines connecting said cells together,
- wherein said conductive lines connect said cells together as if they were a single cell.
A test structure comprising an array of cells connected together by conductive lines, wherein said conductive lines connect said cells together as if they were a single cell, said conductive lines comprising at least one of:
- a common word line;
- a common bit line;
- a common bit line complement line;
- a common N-well voltage line;
- a common interior ground line;
- a common interior voltage line;
- and
- a common ground line.
A method of testing an array structure using conductive lines to connect cells within said array, said method comprising joining at least one of:
- all word lines within said array as a single word line;
- all bit lines within said array as a single bitline;
- all voltage lines within said array as a single voltage line;
- and
- all ground lines together within said array as a single ground line;
- placing a charge on one or more of said conductive lines;
- and
- measuring a charge leakage on others of said conductive lines.
Dependencies are inferred from the claim text.