Methods and structure for improved fairness bus arbitration

A system comprising:

• a shared resource;
• a plurality of master devices coupled to said shared resource wherein each master device generates requests for temporary exclusive access to said shared resource;
• and
• an arbiter for controlling grants of requested temporary exclusive access to said shared resource by said plurality of master devices wherein said arbiter includes:
• a memory element for remembering pending requests for temporary exclusive access by master devices of said plurality of master devices at the time of granting a request by one master device of said plurality of master devices;
• and
• a request grant element coupled to said memory element for granting a pending request for temporary exclusive access by a master device of said plurality of master devices in accordance with information in said memory element.

In a system having multiple master devices coupled to a shared bus, a bus arbiter comprising:

• means for detecting multiple bus requests from multiple requesting devices of said multiple master devices wherein said multiple bus requests are detected substantially simultaneously;
• means for granting said bus to a first requesting device of said multiple requesting devices;
• means for remembering said multiple requesting devices;
• and
• means for granting, responsive to the means for remembering, said bus to other requesting devices of said multiple requesting devices before granting bus requests from other devices of said multiple master devices.