Innovative method to build a high precision analog capacitor with low voltage coefficient and hysteresis

A method for forming a high precision analog capacitor on a semiconductor substrate, the method comprising:

• forming a field oxide layer over a portion of the substrate;
• forming a polysilicon layer over the field oxide layer;
• forming a silicide over the polysilicon layer, thereby defining a bottom plate of the capacitor;
• depositing undoped silicate glass over the substrate;
• depositing phosphosilicate glass over the substrate;
• densifying the undoped silicate glass and the phosphosilicate glass;
• planarizing the phosphosilicate glass;
• depositing undoped silicate glass over the planarized phosphosilicate glass;
• forming a capacitor masking pattern over the substrate;
• etching the undoped silicate glass and phosphosilicate glass using the capacitor masking pattern as a mask and the silicide as an etch stop, thereby defining a capacitor region;
• forming a thin dielectric over the substrate;
• forming a contact masking pattern over the substrate;
• etching the thin dielectric, undoped silicate glass and phosphosilicate glass using the contact masking pattern as a mask and the silicide as an etch stop to form a bottom plate contact hole;
• depositing a metal over the substrate, thereby filling the capacitor region and the bottom plate contact hole;
• and
• planarizing the metal, wherein a top plate of the capacitor and an electrical connection to the bottom plate of the capacitor are defined, and wherein the top plate of the capacitor and the electrical connection to the bottom plate of the capacitor are laterally isolated by the undoped silicate glass and phosphosilicate glass.