Atomic layer-deposited HfA1O3 films for gate dielectrics

A method of forming a dielectric film comprising:

• pulsing a hafnium containing source gas into a reaction chamber containing a substrate;
• pulsing a first oxygen containing source gas into the reaction chamber;
• pulsing an aluminum containing source gas into the reaction chamber;
• and
• pulsing a second oxygen containing source gas into the reaction chamber.

A method of forming a dielectric film comprising:

• pulsing a HfCl4 source gas into a reaction chamber containing a substrate;
• pulsing a first oxygen containing source gas into the reaction chamber;
• pulsing an aluminum containing source gas into the reaction chamber;
• and
• pulsing a second oxygen containing source gas into the reaction chamber.

A method of forming a dielectric film comprising:

• pulsing a hafnium containing source gas into a reaction chamber containing a substrate;
• pulsing a first oxygen containing source gas into the reaction chamber;
• pulsing a trimethylaluminium source gas into the reaction chamber;
• and
• pulsing a second oxygen containing source gas into the reaction chamber.

A method of forming a dielectric film comprising:

• pulsing a hafnium containing source gas into a reaction chamber containing a substrate;
• pulsing a first oxygen containing source gas into the reaction chamber;
• pulsing a DMEAA source gas into the reaction chamber;
• and
• pulsing a second oxygen containing source gas into the reaction chamber.

A method of forming a dielectric film comprising:

• pulsing a HfCl4 source gas into a reaction chamber containing a substrate;
• pulsing a first oxygen containing source gas into the reaction chamber;
• pulsing a trimethylaluminium source gas into the reaction chamber;
• and
• pulsing a second oxygen containing source gas into the reaction chamber.

A method of forming a dielectric film comprising:

• pulsing a HfCl4 source gas into a reaction chamber containing a substrate;
• pulsing a first oxygen containing source gas into the reaction chamber;
• pulsing a DMEAA source gas into the reaction chamber;
• and
• pulsing a second oxygen containing source gas into the reaction chamber.

A method of forming a transistor comprising:

• forming first and second source/drain regions in a substrate;
• forming a body region between the first and second source/drain regions;
• forming a film on the body region between the first and second source/drain regions;
• and
• coupling a gate to the film, wherein forming a film on the body region includes:
• pulsing a hafnium containing precursor into a reaction chamber containing the substrate;
• pulsing a first oxygen containing precursor into the reaction chamber;
• pulsing an aluminum containing precursor into the reaction chamber;
• and
• pulsing a second oxygen containing precursor into the reaction chamber.

A method of forming a memory array comprising:

• forming a number of access transistors, at least one of the access transistors including a film containing HfAlO3 on a body region between a first and second source/drain regions, the film containing HfAlO3 formed by a method including:
• pulsing a hafnium containing source gas into a reaction chamber containing a substrate;
• pulsing a first oxygen containing source gas into the reaction chamber;
• pulsing an aluminum containing source gas into a reaction chamber;
• and
• pulsing a second oxygen containing source gas into the reaction chamber;
• forming a number of word lines coupled to a number of the gates of the number of access transistors;
• forming a number of source lines coupled to a number of the first source/drain regions of the number of access transistors;
• and
• forming a number of bit lines coupled to a number of the second source/drain regions of the number of access transistors.

A method of forming an electronic system comprising:

• providing a processor;
• coupling a memory array to the processor, wherein the memory array includes at least one access transistor having a film containing HfAlO3 on a body region between a first and second source/drain regions, the film containing HfAlO3 formed by a method including:
• pulsing a hafnium containing source gas into a reaction chamber containing a substrate;
• and
• pulsing an aluminum containing source gas into the reaction the chamber;
• and
• forming a system bus that couples the processor to the memory array.

A transistor comprising:

• a body region between a first and a second source/drain regions;
• a film containing HfAlO3 on the body region between the first and second source/drain regions;
• and
• a gate coupled to the film;
• the film formed by atomic layer deposition including:
• pulsing a hafnium containing precursor into a reaction chamber containing a substrate;
• pulsing a first oxygen containing precursor into the reaction chamber;
• pulsing an aluminum containing precursor into a reaction chamber;
• and
• pulsing a second oxygen containing precursor into the reaction chamber.

A transistor comprising:

• a body region between a first and a second source/drain regions;
• a dielectric film containing HfAlO3 disposed on the body region between the first and second source/drain regions;
• and
• a gate coupled to the dielectric film.

A memory array comprising:

• a number of access transistors, each access transistor including a gate coupled to a film containing HfAlO3, the film formed on a body region between a first and a second source/drain regions;
• a number of word lines coupled to a number of the gates of the number of access transistors;
• a number of source lines coupled to a number of the first source/drain regions of the number of access transistors;
• and
• a number of bit lines coupled to a number of the second source/drain regions of the number of access transistors;
• the film formed by atomic layer deposition including:
• pulsing a hafnium containing source gas into a reaction chamber containing a substrate;
• pulsing an aluminum containing source gas into the reaction chamber.

A memory array comprising:

• a number of access transistors, each access transistor including a gate coupled to a film containing HfAlO3, the film disposed on a body region between a first and a second source/drain regions;
• a number of word lines coupled to a number of the gates of the number of access transistors;
• a number of source lines coupled to a number of the first source/drain regions of the number of access transistors;
• and
• a number of bit lines coupled to a number of the second source/drain regions of the number of access transistors.

An electronic system comprising:

• a processor;
• a memory array, the memory array including:
• a number of access transistors, each access transistors having a gate coupled to a film containing HfAlO3, the film formed on a body region between a first and a second source/drain regions;
• a number of word lines coupled to a number of the gates of the number of access transistors;
• a number of source lines coupled to a number of the first source/drain regions of the number of access transistors;
• a number of bit lines coupled to a number of the second source/drain regions of the number of access transistors;
• and
• a system bus that couples the processor to the memory array;
• the film formed by atomic layer deposition including:
• pulsing a hafnium containing source gas into a reaction chamber containing a substrate;
• pulsing an aluminum containing source gas into a reaction chamber.

An electronic system comprising:

• a processor;
• and
• a memory array, the memory array including:
• a number of access transistors, each access transistors having a gate coupled to a film containing HfAlO3, the film disposed on a body region between a first and a second source/drain regions;
• a number of word lines coupled to a number of the gates of the number of access transistors;
• a number of source lines coupled to a number of the first source/drain regions of the number of access transistors;
• a number of bit lines coupled to a number of the second source/drain regions of the number of access transistors;
• and
• a system bus that couples the processor to the memory array.