US 2003/0224599 A1 · Semiconductor device with a copper line having an increased resistance against electromigration and a method of forming the same

Abstract

A copper line that is formed in a patterned dielectric layer has a copper/silicon film formed on a surface thereof to substantially suppress an electromigration path through this surface. In an in situ process, the exposed copper surface is first cleaned by a reactive plasma ambient including nitrogen and ammonia and after a certain clean period, a gaseous compound comprising silicon, for example silane, is added to the reactive plasma ambient to form the copper/silicon film. Additionally, a capping layer may be deposited, wherein due to the copper/silicon film, any deposition technique or even spin-coating may be used.

Claims29

Dependent claims

A method of protecting a copper surface comprising:

providing a substrate having formed thereon a dielectric layer with a recessed portion and copper structure positioned in the recessed portion, wherein the copper structure has at least one exposed copper surface;
creating a first reactive plasma environment comprising nitrogen and ammonia;
exposing the at least one exposed copper surface to the first reactive plasma environment for a first time interval;
creating a second reactive plasma environment comprising nitrogen, ammonia and a gaseous compound including silicon;
and
exposing the at least one exposed copper surface to the second reactive plasma environment for a second time interval that is shorter than the first time interval to form a copper/silicon film on the at least one exposed copper surface.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

10/304,579Filed 26 Nov 2002

Priority

DE 102 24 167.831 May 2002

Published

4 Dec 2003

Term ends

Not estimatedThe source records don’t support an estimate.

Classification7 codes

H10W 20/064
Of conductive parts of the interconnections: by modifying the conductivity of conductive parts, e.g. by alloying
H10P 70/277
During, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers: the processing being a planarisation of…
H10W 20/037
In openings in dielectrics: the barrier, adhesion or liner layers being on top of a main fill metal
H10W 20/055
Of conductive barrier, adhesion or liner layers: by formation methods other than physical vapour deposition [PVD], chemical vapour deposition…

Semiconductor device with a copper line having an increased resistance against electromigration and a method of forming the same

Life of this patent

Semiconductor device with a copper line having an increased resistance against electromigration and a method of forming the same

Life of this patent

Abstract

Claims29