Electrostatic-breakdown-preventive and protective circuit for semiconductor-device
AssigneeOki Electric Industry Co., Ltd.
InventorKatsuhiro Kato
Life of this patent
Estimating the term…
Abstract
The present invention provides a compact electrostatic-breakdown-preventive and protective circuit for a semiconductor-device capable of performing high-speed operations. In the case of the electrostatic-breakdown-preventive and protective circuit for a semiconductor-device of the invention, the distance from a contact hole for connecting an impurity diffusion layer serving as a source and a drain of each of the first and second protective transistors with a metallic wiring to a gate is made shorter than the distance in an output transistor or a protective transistor provided for an input terminal.
Claims12
An electrostatic-breakdown-preventive and protective circuit for a semiconductor-device, the circuit comprising:
- a first protective transistor disposed between a first power-source line, which is connected to one of an output transistor and a protective transistor disposed at an input terminal, and a second power-source line, which is connected to an inverter of an internal circuit;
- and
- a second protective transistor disposed between a first ground line, which is connected to one of an output transistor and a protective transistor disposed at an input terminal, and a second ground line, which is connected to an inverter of an internal circuit;
- wherein
- the distance from a contact hole for connecting an impurity diffusion layer, which serves as a source and as a drain of each of the first and second protective transistors with metallic wiring to a gate of the transistors is smaller than the distance from a contact hole for connecting an impurity diffusion layer, which serves as a source and as a drain of the one of the output transistor and protective transistor disposed at the input terminal with metallic wiring to a gate of transistors.
An electrostatic-breakdown-preventive and protective circuit for a semiconductor-device comprising:
- a first protective transistor disposed between a first power-source line, which is connected to one of an output transistor and a protective transistor disposed at an input terminal and a second power-source line, which is connected to an inverter of an internal circuit;
- and
- a second protective transistor disposed between a first ground line, which is connected to one of an output transistor and a protective transistor disposed at an input terminal, and a second ground line, which is connected to an inverter of an internal circuit;
- wherein
- a compound layer of silicon and metal is formed on the entire surface between a contact hole for connecting an impurity diffusion layer, which serves as a source and as a drain, with a metallic wiring and a gate in each of the first and second protective transistors, and
- a region for forming no compound layer of silicon and metal is formed between a contact hole for connecting an impurity diffusion layer, which serves as a source and as a drain, with a metallic wiring and a gate in the one of the output transistor and the protective transistor disposed for the input terminal.
An electrostatic-breakdown-preventive and protective circuit for a semiconductor-device comprising:
- a first protective transistor disposed between a first power-source line, which is connected to one of an output transistor and a protective transistor disposed at an input terminal, and a second power-source line, which is connected to an inverter of an internal circuit;
- a second protective transistor disposed between a first ground line connected to one of an output transistor and a protective transistor disposed at an input terminal, and a second ground line, which is connected to an inverter of an internal circuit;
- and
- at least one of a first resistor whose one end is connected to the first power-source line in the vicinity of the one of the output transistor and the protective transistor disposed for the input terminal and whose another end is connected to the second power-source line in the vicinity of the inverter of the internal circuit and a second resistor whose one end is connected to the first ground line in the vicinity of the one of the output transistor and the protective transistor disposed for the input terminal and whose another end is connected to the second ground line in the vicinity of the inverter of the internal circuit.
An electrostatic-breakdown-preventive and protective circuit for a semiconductor-device comprising:
- a first resistor whose one end is connected between one of a first output transistor and a protective transistor disposed for an input terminal and a first power-source line connected with the one of the first output transistor and the protective transistor disposed for the input terminal and whose another end is connected between an inverter of an internal circuit and a second power-source line connected with the inverter of the internal circuit;
- and
- a second resistor whose one end is connected between one of a second output transistor and a protective transistor disposed for an input terminal and a first ground line connected with the one of the second output transistor and the protective transistor disposed for the input terminal and whose another end is connected between an inverter of an internal circuit and a second ground line connected with the inverter of the internal circuit.
Dependencies are inferred from the claim text.