Back to results
US 2003/0217219 A1Published application
Using information provided through tag space
AssigneeIntel Corporation
InventorsDebendra Das Sharma, Sridhar Muthrasanallur, Michael D. Smith
Life of this patent
Estimating the term…
Abstract
In some embodiments, the inventions include a device and bus transaction control circuitry to receive bus transactions with tag space including a first part that at times is used to represent a transaction number and a second part that at times contains information which under some conditions is used by the device. Other embodiments are described and claimed.
Claims39
A chip comprising:
- a device;
- and
- bus transaction control circuitry to receive bus transactions with tag space including a first part that at times is used to represent a transaction number and a second part that at times contains information which under some conditions is used by the device.
A system comprising:
- a first chip;
- and
- a second chip coupled to the first chip;
- wherein the first chip includes a first device to issue transactions to a second device in the second chip, wherein the transactions are bus transactions with tag space including a first part that at times is used to represent a transaction number and a second part that at times contains information which under some conditions is used by the second device.
1 more element
A system comprising:
- a first chip;
- a second chip;
- and
- a third chip including a third device and coupled between the first and second chips;
- wherein the first chip includes a first device to issue transactions to a second device in the second chip, wherein the requests are bus transactions with tag space including a first part that at times is used to represent a transaction number and a second part that at times contains information which under some conditions is used by the second device and under some conditions used by the third device.
2 more elements
A chip comprising:
- a device;
- and
- bus transaction control circuitry to receive bus transactions with at least one reserved bit that at times contains information which under some conditions is used by the device.
A chip comprising:
- a device;
- and
- bus transaction control circuitry to receive bus transactions with headers wherein at least one otherwise unused bit in the header at times contains information which under some conditions is used by the device.
Dependencies are inferred from the claim text.