Method for fabricating semiconductor device with triple well structure
AssigneeHynix Semiconductor Inc.
InventorJae-Geun Oh
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Abstract
A method for fabricating a triple well in a semiconductor device, includes the steps of forming a first well of a first conductive type with a first concentration lower than a first target concentration, wherein the first concentration is the minimum dose capable of isolating neighboring wells each other and forming a second well of a second conductive type with a second concentration higher than a second target concentration, wherein the second well includes a first region surrounded by the first well and a second region isolated from the first region by the first well.
Claims20
A method for fabricating a triple well in a semiconductor device, comprising the steps of:
- forming a first well of a first conductive type with a first concentration lower than a first target concentration, wherein the first concentration is the minimum dose capable of isolating neighboring wells each other;
- and
- forming a second well of a second conductive type with a second concentration higher than a second target concentration, wherein the second well includes a first region surrounded by the first well and a second region isolated from the first region by the first well.
The method as recited in claim7, wherein the fifth region is formed with an ion-implantation energy of about 180 KeV to about 300 KeV and an impurity concentration of about 5×1012 ions/cm2 to about 3×1013 ions/cm2.
A method forming a semiconductor device, comprising steps of:
- forming a first well of a first conductive type with a first concentration lower than a first target concentration in a semiconductor substrate, wherein the first concentration is the minimum dose capable of isolating neighboring wells each other;
- forming a second well of a second conductive type with a second concentration higher than a second target concentration, the second well surrounded by the first well;
- implanting impurities of the second conductive type to adjust a threshold voltage of a transistor to be formed on a surface of the semiconductor substrate;
- forming a gate oxide layer and a gate electrode on a predetermined region on the second well;
- and
- forming source/drain regions with a first conductive type at both sides of the gate electrode in the second well.
Dependencies are inferred from the claim text.