Magnetic random access memory with reduced parasitic currents
AssigneeHewlett-Packard Development Company, L.P.
InventorsKenneth K. Smith, Andrew VanBrocklin, Peter J. Fricke
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AssigneeHewlett-Packard Development Company, L.P.
InventorsKenneth K. Smith, Andrew VanBrocklin, Peter J. Fricke
Estimating the term…
Systems and methods for storing data are provided. A representative system for storing data includes a magnetic random access memory (MRAM) device having a plurality of memory cells. Each memory cell includes a magnetic tunnel junction and a non-magnetic tunnel junction that are connected in series. The magnetic tunnel junction stores a bit value corresponding to a logic high (1) or a logic low (0). The non-magnetic tunnel junction provides little resistance when the memory cell is being read, and a substantially high resistance when the memory cell is not being read. As a result, a negligible level of parasitic current leaks through memory cells that are not being read.
A Magnetic Random Access Memory (MRAM) cell comprising:
A Magnetic Random Access Memory (MRAM) device comprising:
A Magnetic Random Access Memory (MRAM) device comprising:
A method for reading a value stored in a magnetic random access memory (MRAM) cell, comprising:
An array of memory cells comprising:
A Magnetic Random Access Memory (MRAM) cell comprising:
Dependencies are inferred from the claim text.