Device that makes it possible to selectively use nonvolatile memory as RAM or ROM

A memory write control device that controls writing of bit information in a plurality of nonvolatile memory cells, each one of the nonvolatile memory cells located at a crossing point of a plurality of bit-lines and a plurality of word-lines arranged in a matrix form, by controlling a direction of a current supplied to each of the word-lines, the memory write control device comprising:

• a current supply control unit that supplies a current generated by a current source to each of the bit-lines and word-lines in a predetermined direction, in accordance with a trigger signal;
• a first current direction control unit that supplies the current generated by the current source to each of the bit-lines in a predetermined direction, in accordance with the trigger signal;
• and
• a second current direction control unit that supplies the current generated by the current source to the word-lines and controls the direction of the current supplied to each of the word-lines, in accordance with the trigger signal.

A memory write control device that controls writing of bit information in a plurality of nonvolatile memory cells, each one of the nonvolatile memory cells locate data crossing point of a plurality of bit-lines and a plurality of word-lines arranged in a matrix form, by controlling a direction of a current supplied to each of the word-lines, the memory write control device comprising:

• a first current supply control unit that receives a current supplied by a current source, and a mode signal, and performs one of operations in accordance with the mode signal, the operations that are outputting the received current, not outputting the received current, and supplying the received current in a predetermined direction to each of the word-lines;
• a second current supply control unit that receives the current supplied by the current source and the mode signal, and performs one of operations in accordance with the mode signal, the operations that are outputting the received current, not outputting the received current, and supplying the received current to each of the bit-lines in a predetermined direction;
• a third current supply control unit that supplies the current supplied by the current source to each of the bit-lines and word-lines in a predetermined direction, in accordance with a trigger signal;
• a first current direction control unit that supplies the current output by the first current supply control unit to each of the bit-lines in a predetermined direction, in accordance with the mode signal;
• and
• a second current direction control unit that supplies the current output by the second current supply control unit to the word-lines and controls the direction of the current supplied to each of the word-lines, in accordance with the mode signal.