MIS capacitor and method of formation

A memory device comprising:

• a substrate;
• a memory cell formed over said substrate, said memory cell comprising a transistor including a gate fabricated on said substrate, and source and drain regions in said substrate disposed adjacent to said gate;
• and
• a charge storage capacitor electrically connected to one of said source and drain regions, said capacitor comprising a semiconductive layer, an aluminum oxide dielectric layer formed over said semiconductive layer, and a metal nitride layer formed over said aluminum oxide dielectric layer.

A processor-based system comprising:

• a processor;
• and
• an integrated circuit coupled to said processor, at least one of said integrated circuit and processor containing a capacitor, said capacitor comprising a hemispherical grained polysilicon lower capacitor electrode;
• an aluminum oxide dielectric layer formed over said lower capacitor electrode;
• and a metal nitride upper capacitor electrode formed over said aluminum oxide dielectric layer.

A method of forming an MIS capacitor on a semiconductor substrate, comprising the acts of:

• forming a semiconductive layer over a substrate;
• forming a dielectric layer comprising aluminum oxide over said semiconductive layer by atomic layer deposition;
• and
• forming a metal nitride layer over said dielectric layer.

A method of forming an aluminum oxide MIS capacitor on a semiconductor substrate, comprising the acts of:

• forming a lower capacitor electrode of hemispherical grained polysilicon over said semiconductor substrate;
• forming a dielectric composite stack comprising aluminum oxide over said lower capacitor electrode;
• and
• forming an upper capacitor electrode of tungsten nitride over said dielectric composite stack.