Alignment mark shielding ring without arcing defect and method for using
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChen-Fang Chung
Life of this patent
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChen-Fang Chung
Estimating the term…
An alignment mark shielding ring for use in a physical vapor deposition chamber and a method for using the ring to avoid arcing problems on the wafer. The alignment mark shielding ring can be constructed of a ring that has a generally L-shaped cross-section, at least one hood portion to function as the shield for the alignment mark, at least one alignment pin for engaging at least one alignment sleeve mounted in a lower chamber shield for holding the alignment mark shielding ring in place. The alignment sleeve is constructed in two halves, each having an aperture therethrough. The aperture in the top half is larger than the aperture in the bottom half such that even when the apertures are coated with a metal layer deposited in the PVD process, the alignment pin does not electrically short to the lower chamber shield and thus, any possibility of arcing is avoided.
An alignment mark shielding ring for use in a process chamber comprising:
A pedestal system equipped with an arc-proof alignment mark shielding ring for use in a process chamber comprising:
A method for shielding an alignment mark on a wafer in a process chamber comprising the steps of:
Dependencies are inferred from the claim text.