Direct alignment of contacts

An integrated circuit package, the improvement comprising:

• a VDDcore mesh layer, the VDDcore mesh layer having traces,
• a VSScore mesh layer, the VSScore mesh layer having traces, and
• a redistribution layer overlying the VDDcore mesh layer and the VSScore mesh layer, the redistribution layer for receiving an integrated circuit having VDDcore contacts in first known positions and VSScore contacts in second known positions, the redistribution layer having;
• first contacts positioned in alignment with the first known positions to make electrical connections between the redistribution layer and the VDDcore contacts,
• second contacts positioned in alignment with the second known positions to make electrical connections between the redistribution layer and the VSScore contacts,
• first electrically conductive vias positioned in alignment with the first known positions to make electrical connections between the first contacts and the VDD mesh layer without using a VDDcore bus that extends substantially across the redistribution layer, where the traces of the VDD mesh layer are positioned in alignment with the first known positions, and
• second electrically conductive vias positioned in alignment with the second known positions to make electrical connections between the second contacts and the VSS mesh layer without using a VSScore bus that extends substantially across the redistribution layer, where the traces of the VSS mesh layer are positioned in alignment with the second known positions.

In an improved method of making electrical connections between an integrated circuit and a package substrate, the improvement comprising the steps of:

• fabricating VDDcore contacts in first known positions on the integrated circuit and VSScore contacts in second known positions on the integrated circuit,
• fabricating a VDDcore mesh layer, the VDDcore mesh layer having traces,
• fabricating a VSScore mesh layer, the VSScore mesh layer having traces, and
• fabricating a redistribution layer adjacent the integrated circuit and overlying the VDDcore mesh layer and the VSScore mesh layer, the redistribution layer having;
• first contacts positioned in alignment with the first known positions to make electrical connections between the redistribution layer and the VDDcore contacts,
• second contacts positioned in alignment with the second known positions to make electrical connections between the redistribution layer and the VSScore contacts,
• first electrically conductive vias positioned in alignment with the first known positions to make electrical connections between the first contacts and the VDD mesh layer without using a VDDcore bus that extends substantially across the redistribution layer, where the traces of the VDD mesh layer are positioned in alignment with the first known positions, and
• second electrically conductive vias positioned in alignment with the second known positions to make electrical connections between the second contacts and the VSS mesh layer without using a VSScore bus that extends substantially across the redistribution layer, where the traces of the VSS mesh layer are positioned in alignment with the second known positions.