US 2003/0209775 A1 · Methods and structures for metal interconnections in integrated circuits

Abstract

A typical integrated-circuit fabrication requires interconnecting millions of microscopic transistors and resistors with metal wires. Making the metal wires flush, or coplanar, with underlying insulation requires digging trenches in the insulation, and then filling the trenches with metal to form the wires. The invention provides a new “trench-less” or “self-planarizing” method of making coplanar metal wires. Specifically, one embodiment forms a first layer that includes silicon and germanium; oxidizes a region of the first layer to define an oxidized region and a non-oxidized region; and reacts aluminum or an aluminum alloy with the non-oxidized region. The reaction substitutes, or replaces, the non-oxidized region with aluminum to form a metallic wire coplanar with the first layer. Another step removes germanium oxide from the oxidized region to form a porous insulation having a very low dielectric constant, thereby reducing capacitance.

Claims25

Dependent claims

An integrated-circuit assembly comprising:

first and second integrated transistors;
a first layer including first and second conductive regions respectively contacting the first and second integrated transistors;
a silicon-germanium layer having oxidized and non-oxidized regions, with the non-oxidized region contacting the first conductive region.

Dependencies are inferred from the claim text.

Facts

Application

10/338,178Filed 7 Jan 2003

Priority

25 Feb 1998

Published

13 Nov 2003

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10W 20/056
Of conductive parts of the interconnections: by filling conductive material into holes, grooves or trenches
H10W 20/064
Of conductive parts of the interconnections: by modifying the conductivity of conductive parts, e.g. by alloying
H10W 20/072
Of dielectric parts thereof: of dielectric parts comprising air gaps
H10W 20/4451
Conductive materials thereof: semiconductor materials, e.g. polysilicon

Family

Application09/030,430Division · filed 25 Feb 1998

Application09/651,471Continuation · filed 30 Aug 2000

Application09/651,471Division · filed 30 Aug 2000

Application10/338,178Continuation · filed 7 Jan 2003

US 6,121,126 ARelated patent

US 6,504,224 B1Related patent

US 6,879,017 B2Related patent

US 2003/0209775 A1This patent

From the US filing history. Foreign family members aren’t listed.

Methods and structures for metal interconnections in integrated circuits

Life of this patent

Methods and structures for metal interconnections in integrated circuits

Life of this patent

Abstract

Claims25