Semiconductor inspecting system, semiconductor defect analyzing system, semiconductor design data modifying system, semiconductor inspecting method, semiconductor defect analyzing method, semiconductor design data modifying method, and computer readable recorded medium

A semiconductor defect analyzing system comprising:

• a first memory for storing therein a design data of a semiconductor device;
• a data retrieving part for extracting an inspected object region from said first memory, said inspected object region being a region serving as an object to be inspected;
• a second memory for storing therein a defect inspection data concerning an actual defect and a degree of the defect which are obtained by inspecting a processed pattern which is processed on the basis of said design data;
• a design data processing part for acquiring a first lattice region by dividing said inspected object region by a lattice having an optional size on said defect inspection data so that a place at which said defect has occurred is arranged at the center thereof, said optional size being given as a parameter, and for acquiring a second lattice region by dividing said inspected object region by said lattice on the basis of said defect inspection data so that a non-defective place of said processed pattern is arranged at the center thereof, said non-defective place being a place which is appropriately processed, and for preparing a first design characteristic item data and a second design characteristic item data every said second lattice region and every said second lattice region respectively by deriving a numerical value indicative of a design characteristic of said design data every said first lattice region and every said second lattice region respectively;
• a third memory for storing therein a data on an observable process result relating to a processing of said pattern based on said design data;
• a process data processing part for collecting a value of a first process result corresponding to a pattern in said first lattice region, and a value of a second process result corresponding to a pattern in said second lattice region;
• and
• a defect occurrence rule preparing part for preparing a defect occurrence rule by correlating a combination of said first design characteristic item data and a value of said first process result with said defect and the degree of said defect and by correlating a combination of said second design characteristic item data and a value of said second process result with said defect and the degree of said defect.

A semiconductor design data modifying system comprising:

• a memory for storing therein a data on a defect occurrence rule obtained by analyzing a correlation between the presence of said defect and the degree of said defect and a combination of design characteristic causing a defect and a value of a process result relating to said design characteristic;
• a pattern checking part for extracting a pattern capable of causing a defect from said design data on the basis of said defect occurrence rule;
• a design data modifying part for modifying said design data with respect to said extracted pattern to output a modified design data;
• a modified design data processing part for receiving a data on an optical lattice size and a data on an optional lattice interval as first parameters which are used to analyze said modified design data, for dividing said modified design data into optional combinations of said lattice interval and said lattice size, for deriving numerical values indicative of design characteristics of said modified design data with respect to the obtained lattice region, and for preparing a modified design characteristic item data;
• and
• an operation part for comparing said modified design characteristic item data with said defect occurrence rule and for calculating a probability of a failure, which is a defect causing probability.

A semiconductor inspecting method comprising the steps of:

• extracting an inspected object region from a design data of a semiconductor device and dividing said inspected object region by a lattice of an optional size to prepare lattice regions, said inspected object region serving as an object to be inspected;
• deriving a numerical value indicative of a design characteristic of said design data every one of said lattice regions to prepare a design characteristic item data;
• preparing a characteristic classification data by classifying said design characteristic item data into a desired number of groups;
• extracting said lattice regions at random from said characteristic classification data at a constant sampling rate with respect to the number of said lattice regions belonging to said group;
• actually inspecting a pattern of said lattice regions of a processed pattern which is processed on the basis of said design data, said pattern of said lattice regions having been extracted at said sampling rate, and acquiring a defect inspection data which is a data concerning a defect;
• and
• calculating the number of defects in the whole inspected object region on the basis of said defect inspection data, said characteristic classification data and said sampling rate.

A semiconductor defect analyzing method comprising the steps of:

• acquiring first lattice regions by dividing an inspected object region in said design data by a lattice having an optional size on the basis of a defect inspection data concerning an actual defect and a degree of the defect so that a place at which said defect occurs is arranged at the center thereof, deriving a numerical value indicative of a design characteristic of said design data every one of said first lattice regions and preparing a first design characteristic item data, said defect and the degree of the defect being obtained by inspecting a processed pattern which is processed on the basis of a design data;
• collecting a value of a first process result corresponding to a pattern in said first lattice regions on the basis of a data on an observable process result relating to a processing of said pattern based on said design data;
• acquiring second lattice regions by dividing said inspected object region by a lattice of said optional size on the basis of said defect inspection data so that an appropriate processed non-defective place is arranged at the center thereof, and deriving a numerical value indicative of a design characteristic of said design data every one of said second lattices and for preparing a second design characteristic item data;
• collecting a value of a second process result corresponding to a pattern in said second lattice regions from a data on said process result;
• and
• preparing a defect occurrence rule by correlating a combination of said first design characteristic item data and a value of said first process result with said defect and the degree of said defect and by correlating a combination of said second design characteristic item data and a value of said second process result with said defect and the degree of said defect.

A semiconductor design data modifying method comprising the steps of:

• extracting a pattern capable of causing a defect from a design data of a semiconductor device on the basis of a defect occurrence rule which is prepared on the basis of said design data and which is indicative of a correlation of the presence of the defect and the degree of the defect and a combination of a design characteristic of said design data causing a defect and a value of a process result relating to said design characteristic;
• modifying said design data with respect to the extracted pattern to output a modified design data;
• acquiring lattice regions by dividing said modified design data by an optional combination of a lattice of an optional size and an optional lattice interval, deriving a numerical value indicative of a design characteristic of said modified design data with respect to each of said lattice regions and preparing a modified design characteristic item data;
• and
• comparing said modified design characteristic item data with said defect occurrence rule to calculate a probability of a failure, which is a defect causing probability.

A computer readable recorded medium in which a program for causing a computer to execute a semiconductor inspecting method has been recorded, said semiconductor inspecting method comprising the step of:

• extracting an inspected object region from a design data of a semiconductor device and dividing said inspected object region by a lattice of an optional size to prepare lattice regions, said inspected object region serving as an object to be inspected;
• deriving a numerical value indicative of a design characteristic of said design data every one of said lattice regions to prepare a design characteristic item data;
• preparing a characteristic classification data by classifying said design characteristic item data into a desired number of groups;
• extracting said lattice regions at random from said characteristic classification data at a constant sampling rate with respect to the number of said lattice regions belonging to said group;
• actually inspecting a pattern of said lattice regions of a processed pattern which is processed on the basis of said design data, said pattern of said lattice regions having been extracted at said sampling rate, and acquiring a defect inspection data which is a data concerning a defect;
• and
• calculating the number of defects in the whole inspected object region on the basis of said defect inspection data, said characteristic classification data and said sampling rate.

A computer readable recorded medium in which a program for causing a computer to execute a semiconductor defect analyzing method, said semiconductor defect analyzing method comprising the steps of:

• acquiring first lattice regions by dividing an inspected object region in said design data by a lattice having an optional size on the basis of a defect inspection data concerning an actual defect and a degree of the defect so that a place at which said defect occurs is arranged at the center thereof, deriving a numerical value indicative of a design characteristic of said design data every one of said first lattice regions and preparing a first design characteristic item data, said defect and the degree of the defect being obtained by inspecting a processed pattern which is processed on the basis of a design data;
• collecting a value of a first process result corresponding to a pattern in said first lattice regions on the basis of a data on an observable process result relating to a processing of said pattern based on said design data;
• acquiring second lattice regions by dividing said inspected object region by a lattice of said optional size on the basis of said defect inspection data so that an appropriate processed non-defective place is arranged at the center thereof, and deriving a numerical value indicative of a design characteristic of said design data every one of said second lattices and for preparing a second design characteristic item data;
• collecting a value of a second process result corresponding to a pattern in said second lattice regions from a data on said process result;
• and
• preparing a defect occurrence rule by correlating a combination of said first design characteristic item data and a value of said first process result with said defect and the degree of said defect and by correlating a combination of said second design characteristic item data and a value of said second process result with said defect and the degree of said defect.

A computer readable recorded medium in which a program for causing a computer to execute a semiconductor defect analyzing method, said semiconductor defect analyzing method comprising the steps of:

• extracting an inspected object region from a design data of a semiconductor device and preparing first lattice regions by dividing said inspected object region into lattices of an optional first size, said inspected object region serving as an object to be inspected, and, said optional first size being given as a first parameter;
• preparing a first design characteristic item data by deriving a numerical number indicative of a design characteristic of said design data every one of said first lattice regions;
• preparing a characteristic classification data by classifying said design characteristic item data into a desired number of groups;
• extracting said lattice regions at random from said characteristic classification data at a constant sampling rate with respect to the number of said lattice regions belonging to the groups;
• acquiring second lattice regions by dividing said inspected object region in said design data into lattices of a second size so that a place causing said defect is arranged at the center thereof on the basis of a defect inspection data relating to an actual defect and a degree of the defect of the processed patterns which are processed on the basis of said design data, the second size being given as a second parameter, and, said actual defect and the degree of the defect being obtained by inspecting a pattern of said lattice region which is extracted at said sampling rate;
• deriving a numerical value indicative of a design characteristic of said design data every one of said second lattice regions to prepare a second design characteristic item data;
• collecting a value of a first process result corresponding to a pattern in said second lattice regions on the basis of a data on an observable process result relating to a processing of the pattern based on the design data;
• obtaining third lattice regions by dividing said inspected object region into lattices of said second size so that a processed non-defective place is arranged at the center thereof on the basis of said defect inspection data and deriving a numerical value indicative of a design characteristic of said design data every one of said obtained third lattice regions to prepare a third design characteristic item data;
• collecting a value of a second process result corresponding to a pattern in said third lattice regions from a data on said process result;
• preparing a defect occurrence rule by acquiring a first correlation between said defect and the degree of said defect and a combination of said second design characteristic item data and the value of said first process result, and a second correlation between the value of said second process result and said defect and the degree of said defect and a combination of said third design characteristic item data.

A computer readable recorded medium in which a program for causing a computer to execute a semiconductor design data modifying method, said semiconductor design data modifying method comprising the steps of:

• extracting a pattern capable of causing a defect from a design data of a semiconductor device on the basis of a defect occurrence rule which is prepared on the basis of said design data and which is indicative of a correlation of the presence of the defect and the degree of the defect and a combination of a design characteristic of said design data causing a defect and a value of a process result relating to said design characteristic;
• modifying said design data with respect to the extracted pattern to output a modified design data;
• acquiring lattice regions by dividing said modified design data by an optional combination of a lattice of an optional size and an optional lattice interval, deriving a numerical value indicative of a design characteristic of said modified design data with respect to each of said lattice regions and preparing a modified design characteristic item data;
• and
• comparing said modified design characteristic item data with said defect occurrence rule to calculate a probability of a failure, which is a defect causing probability.