Electrocoating process to form a dielectric layer in an organic substrate to reduce loop inductance

A method of forming an organic dielectric layer in a self-aligned through via-in-via structure, comprising:

• forming a first electrode layer on the sidewall of a through via in an organic substrate material;
• forming a high-integrity organic dielectric layer over the first electrode layer such that the thickness of the formed organic dielectric layer is less than about 30 microns in thickness such that the dielectric layer leaves a portion of the through via unfilled;
• and
• filling the unfilled portion of the through via with a second conductive material.

A method of forming an organic dielectric layer on a substantially planar multilayered organic substrate material, comprising:

• forming a first conductive layer on the multilayered organic substrate material;
• electrocoating a high-integrity organic dielectric layer over the first conductive layer;
• and
• forming a second conductive layer over the formed organic dielectric layer such that the organic dielectric layer provides a lower loop inductance value between the first and second conductive layers.

A method of forming a capacitor, comprising:

• forming a first electrode, by forming a layer of conductive material over the sidewall of a through via;
• electrocoating a high-integrity organic dielectric layer over the first electrode layer such that a portion of the through via is left unfilled;
• and
• forming a second electrode, by filling the remaining unfilled portion of the through via by a conductive material such that the electrocoated dielectric layer provides a low loop inductance value between the formed first and second electrodes.

A capacitor, comprising:

• a through via having the sidewall defined by an organic substrate;
• a first electrode layer overlying the sidewall of the through via;
• an organic dielectric layer having a thickness of less than about 30 microns overlie the first electrode leaving a portion of the through via unfilled;
• and
• a second electrode layer formed in the remaining unfilled portion of the through via.

A multilayered print circuit board, comprising:

• a first conductive layer, formed over the substantially planar multilayered printed circuit board;
• an organic dielectric layer, formed over the first conductive layer using an electrocoating process;
• and
• a second conductive layer, formed over the electrocoated organic dielectric layer.