Seedable pseudo-random number generator

A pseudo-random number generator, comprising:

• means for cascaded shifting a plurality of bit values between a plurality of stages, generating a feedback bit value by application of a selected logic function to bit values in selected ones of the stages, and providing the feedback bit value as an input bit value to a first one of the stages;
• a cellular automaton having a plurality of cells, each cell configured to provide an output bit value;
• and
• means for generating a pseudo-random number that includes a plurality of bits, a value of each bit of the pseudo-random number generated by application of a selected logic function to a bit value from a selected one of the plurality of stages and the output bit value from a selected one of the plurality of cells.

A method for generating a pseudo-random number, comprising:

• generating a first pseudo-random number with a linear feedback shift register arrangement;
• generating a second pseudo-random number with a cellular automaton;
• and
• generating an output pseudo-random number by application of a selected logic function between bits of the first pseudo-random number and bits of the second pseudo-random number.

A method for generating a pseudo-random number, comprising:

• storing an initial first plurality of bit values in a plurality of storage elements;
• generating a next state of bit values in the storage elements by performing a cascaded shift of the plurality of bit values between the storage elements, generating a feedback bit value by application of a first selected logic function to bit values from selected ones of the storage elements, and providing the feedback bit value as an input bit value to a first one of the storage elements;
• storing an initial second plurality of bit values in respective cells of a cellular automaton;
• generating a next state of a bit value for each cell of the cellular automaton from a selected function applied to output bit values of a selected respective subset of the cells;
• and
• generating a pseudo-random number that includes a plurality of bits, each value of a bit of the pseudo-random number generated by application of a second selected logic function to a bit value from a selected one of the plurality of storage elements and an output bit value from a selected one of the cells of the cellular automaton.

A pseudo-random number generator, comprising:

• a linear feedback shift register (LFSR) having a plurality of stages and an output port at each stage;
• a plurality of cellular automata, each having a plurality of cells and an output port at each cell;
• and
• a plurality of logic circuit elements, each implementing a selected logic function and having a one input port coupled to an output port of a stage of the LFSR, a plurality of other input ports coupled to output ports of cells of the plurality of cellular automata, respectively, and an output port that provides one bit of the pseudo-random number.

A pseudo-random number generator, comprising:

• a linear feedback shift register (LFSR) having a plurality of stages and an output port at each stage;
• a plurality of cellular automata, each having a plurality of cells and an output port at each cell;
• and
• a plurality of logic circuit elements, each implementing a selected logic function and having a first input port coupled to an output port of a stage of the LFSR, a second input port coupled to an output port of a selected cell of a selected one of the plurality of cellular automata, and an output port that provides one bit of the pseudo-random number.

A computer-readable medium configured with instructions for causing one or more computers to perform a method for generating a pseudo-random number, the method comprising:

• generating a first pseudo-random number with a linear feedback shift register arrangement;
• generating a second pseudo-random number with a cellular automaton;
• and
• generating an output pseudo-random number by application of a selected logic function between bits of the first pseudo-random number and bits of the second pseudo-random number.

A computer-readable medium configured with instructions for causing one or more computers to perform a method for generating a pseudo-random number, the method comprising:

• storing an initial first plurality of bit values in a plurality of storage elements;
• generating a next state of bit values in the storage elements by performing a cascaded shift of the plurality of bit values between the storage elements, generating a feedback bit value by application of a first selected logic function to bit values from selected ones of the storage elements, and providing the feedback bit value as an input bit value to a first one of the storage elements;
• storing an initial second plurality of bit values in respective cells of a cellular automaton;
• generating a next state of a bit value for each cell of the cellular automaton from a selected function applied to output bit values of a selected respective subset of the cells;
• and
• generating a pseudo-random number that includes a plurality of bits, each value of a bit of the pseudo-random number generated by application of a second selected logic function to a bit value from a selected one of the plurality of storage elements and an output bit value from a selected one of the cells of the cellular automaton.