Method of fabricating one or more tiers of an integrated circuit

A process for forming a portion of an integrated circuit, comprising:

• positioning a layer of material on a substrate, wherein the material includes a precursor to a dielectric composition and a sacrificial polymer;
• bringing a patterned stamp in contact with the layer to mold the layer;
• curing the precursor to the dielectric composition, thereby forming a molded layer of dielectric material;
• removing the stamp from the molded layer of dielectric material, thereby leaving a pattern in the molded layer;
• decomposing the sacrificial polymer to form porous dielectric material;
• depositing metal onto the patterned layer;
• and
• planarizing the metal to form a portion of an integrated circuit.

A process for forming a portion of an integrated circuit, comprising:

• positioning a layer of material on a substrate;
• contacting the material with a surface having relief structures therein;
• imparting a pattern to the material through said contact to form a patterned layer, wherein the pattern is determined by the relief structures;
• decomposing a sacrificial polymer present in the material to form porous dielectric material;
• and
• depositing metal onto the patterned layer to form a portion of an integrated circuit.