MOS antifuse with low post-program resistance
AssigneeInternational Business Machines Corporation
InventorsCarl J. Radens, William R. Tonti
Life of this patent
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Abstract
A semiconductor device having an increased intersection perimeter between edge regions of a first conductor and portions of a second conductor is disclosed. In one embodiment, the intersection perimeter is the region where the perimeter of a gate structure overlaps an active area. The intersection perimeter between the conductors directs the breakdown of the dielectric material, increasing the likelihood that the programming event will be successful. In at least one embodiment, the portion of a current path that travels through a highly doped area is increased while the portion that travels through a non-highly doped area is decreased. This decreases post-program resistance, leading to better response time for the device.
Claims20
A device adapted to function as an antifuse, said device comprising a first conductor, a second conductor, and an insulator between said first and second conductors, said device having first discrete regions having a first programming voltage and second discrete regions having a second programming voltage less than said first programming voltage.
An antifuse on a chip comprising a dielectric material positioned between a conductor and an active area, said dielectric material having a first thickness, wherein discrete portions of said dielectric material have a second thickness less than said first thickness where an edge portion of one of said conductor and said active area overlaps the other of said conductor and said active area.
A method for increasing the statistical programming of an antifuse, said method comprising the steps of:
- forming a first conductor and a second conductor separated by a dielectric material;
- and
- increasing an intersection perimeter of said antifuse.
Dependencies are inferred from the claim text.