Multi-level integrated circuit for wide-gap substrate bonding
AssigneeHewlett-Packard Development Company, L.P.
InventorsMichael J. Regan, John Liebeskind, Charles C. Haluzak
Life of this patent
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Abstract
An integrated circuit includes a substrate having an etched surface and a non-etched surface. The etched surface contains circuit elements and the non-etched surface contains a bonding surface. The non-etched surface is located at a predetermined height from the etched surface. Bonding this integrated circuit with another substrate creates a wide-gap between the substrates that is preferably evacuated and hermetically sealed.
Claims50
An integrated circuit, comprising:
- a substrate having an etched surface and a non-etched surface, the etched surface containing circuit elements and the non-etched surface containing a bonding surface, the non-etched surface at a predetermined height from the etched surface.
An integrated circuit, comprising:
- a substrate having a first surface containing circuit elements and a second surface elevated from the first surface through a gradual incline;
- and
- a set of continuous conductive traces extending from the first surface to the second surface.
A micro-machined system, comprising:
- a first substrate having a first surface containing circuit elements and a second surface elevated from the first surface through a gradual incline, the substrate including a set of continuous conductive traces extending from the first surface to the second surface;
- and
- a second substrate having a set of conductive traces, the second substrate bonded to said first substrate such that the set of conductive traces of the first substrate contacts the set of conductive traces of the second substrate to form electrical connections.
A method for creating an integrated circuit, comprising the steps of:
- patterning a hard mask over a portion of a substrate;
- etching a trench within the substrate to a desired depth thereby forming an inclined sidewalls from a first surface of the etched substrate to a second surface covered by the hard mask;
- removing the hard mask;
- and
- forming circuit elements using semiconductor processing steps on the first surface.
A method of creating a multi-level substrate, comprising the steps of:
- patterning a hard mask on the substrate;
- etching the substrate to a desired depth;
- and
- fabricating circuit elements on the etched surface of the substrate.
A method for creating a gradual incline for improved step coverage, comprising the steps of:
- masking a <100> substrate surface with a hard mask;
- patterning the hard mask to define an opening within the hard mask;
- etching the <100> substrate surface to create an inclined angled profile along the <111> orientation of the substrate;
- removing at least a portion of the hard mask to expose a portion of the <100>substrate surface that interfaces with the <111> etched inclined angle profile;
- and
- etching the exposed <100> substrate surface to create a <311> inclined angle profile that is less steep than the <111> inclined angled profile.
Dependencies are inferred from the claim text.