Dual-type thin-film field-effect transistors and applications
AssigneeInternational Business Machines Corporation
InventorsThomas Doderer, Wei Hwang, Chang C. Tsuei
Life of this patent
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Abstract
A microelectronic device includes a gate layer adapted to receive an input voltage. An insulating layer is formed on the gate layer, and a conductive channel layer is formed on the insulating layer and carries current between a source and a drain. The conductive channel layer is adapted to provide a dual channel. The dual channel includes both a p-channel and an n-channel wherein one of the p-channel and the n-channel are selectively enabled responsive to the input voltage polarity. A method for forming the device and applications are also disclosed and claimed.
Claims31
A microelectronic device comprising:
- a gate layer adapted to receive an input voltage;
- an insulating layer formed on the gate layer;
- a conductive channel layer formed on the insulating layer for carrying current between a source and a drain;
- and
- the conductive channel layer adapted to provide a dual channel, the dual channel including both a p-channel and an n-channel wherein one of the p-channel and the n-channel are selectively enabled responsive to the input voltage.
A circuit comprising:
- a thin film transistor having a gate, a source and a drain;
- the thin film transistor including a gate layer for forming the gate, the gate adapted to receive an input voltage;
- an insulating layer formed on the gate layer;
- a conductive channel layer formed on the insulating layer for carrying current between the source and the drain;
- and
- the conductive channel layer adapted to provide a dual channel, the dual channel including both a p-channel and an n-channel wherein one of the p-channel and the n-channel are selectively enabled responsive to the input voltage.
A method for forming a dual channel transistor comprising the steps of:
- providing a gate layer for receiving input voltages;
- depositing an insulating layer on the gate layer;
- forming a dual channel layer on the insulating layer by:
- epitaxially depositing a cuprate layer on the insulating layer;
- and
- annealing the cuprate layer in a reducing environment to provide a substantially defect free cuprate layer such that the dual channel includes both a p-channel and an n-channel wherein one of the p-channel and the n-channel are selectively enabled responsive to the input voltage during operation;
- and
- forming source and drain electrodes on the conductive channel layer.
Dependencies are inferred from the claim text.