US 2003/0199150 A1 · Method of preventing seam defects in isolated lines

Abstract

A method of preventing seam defects on narrow, isolated lines of 0.3 micron or less during CMP process is provided. The solution is to change the size of features of dummy metal structures on the same layer as the metal layer to have a width that is about 0.6 micron or less so that during the electroplating the deposition rate in the features is similar to the narrow, isolated lines. The density, shape, and proximity of the dummy metal structures further prevents the seam defects during CMP processing by preventing Galvanic corrosion.

Claims8

Dependent claims

A method of preventing seam defects on narrow, isolated lines in the active region on a semiconductor device layer during CMP process with dummy metal structures comprising the steps of:

providing dummy metal structures with features thereof of widths to have fill up rates that match the narrow, isolated lines on said semiconductor device layer and
CMP polishing said isolated line or other line and said dummy metal structures.

Dependencies are inferred from the claim text.

Facts

Application

10/322,763Filed 19 Dec 2002

Priority

17 Apr 2002

Published

23 Oct 2003

Term ends

Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10W 20/031
Manufacture or treatment: of conductive parts of the interconnections
H10P 52/403
Chemomechanical polishing [CMP]: of conductive or resistive materials
H10W 20/062
Of conductive parts of the interconnections: by smoothing of conductive parts, e.g. by planarisation
H10W
Generic packages, interconnections, connectors or other constructional details of devices covered by

Method of preventing seam defects in isolated lines

Life of this patent

Method of preventing seam defects in isolated lines

Life of this patent

Abstract

Claims8