Method for forming a via in a damascene process

#The present claimed invention relates to the field of semiconductor processing. More particularly, the present claimed invention relates to a method for forming a via in a damascene process.

#As semiconductor geometries continue to become smaller and smaller, new difficulties arise in the fabrication of the correspondingly smaller features. As one example, when device sizes decrease in size (in order to form more devices on each wafer), features such as vias have critical dimensions (CDs) which become considerably smaller. The reduced CD of, for example, a via has certain drawbacks associated therewith. Referring now to Prior Art FIG. 1A, a side sectional view of a via formed in a damascene process wherein the via has a reduced CD is shown. In Prior Art FIG. 1A, a substrate 100 has a via 102 formed therein using a damascene process. In the structure of Prior Art FIG. 1A, the critical dimension (CD) is shown as the width, W, at the top of via 102. Furthermore, via 102 has a depth, D.

#Referring still to Prior Art FIG. 1A, as the CD of via 102 decreases, significant manufacturing difficulties arise. For example, in a damascene process, such a via is typically formed using a plurality (e.g. two major etches for the formation of via 102) of anisotropic etches in order to etch a sufficient depth into substrate 100 while still maintaining the desired CD for via 102. As a result, sharp corners, typically shown as 104a and 104b and 106a and 106b, are formed at the top edges present within via 102. Sharp corners 104a and 104b induce stress in subsequently deposited overlying layers and reduce adherence of the overlying layer to underlying substrate 100.

#The accompanying drawings, which are incorporated in and form a part of this specification, illustrates embodiments of the invention and, together with the description, serve to explain the principles of the invention:

#PRIOR ART FIG. 1A is a side sectional view of a via formed into a substrate wherein the via has a small critical dimension.

#PRIOR ART FIG. 1B is a side sectional view of the structure of PRIOR ART FIG. 1A having a layer of material disposed thereover.

#The drawings referred to in this description should be understood as not being drawn to scale except if specifically noted.

#Reference will now be made in detail to the preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the preferred embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be obvious to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present invention.

#FIGS. 2A-2K provide side sectional views of the structure created according to embodiments of the method of the present invention as set forth in the flow charts of FIGS. 3 and 4. For purposes of clarity, the following discussion will utilize the side sectional views of FIGS. 2A-2K in conjunction with the flow charts of FIGS. 3 and 4 to clearly describe the embodiments of the present invention. Flow chart 300 of FIG. 3 begins with step 302. At step 302, the present embodiment deposits a first etch stop layer above a material 202 in which a target 203 is present. As will be described in detail below, the damascene process formed via to be created in accordance with the present embodiment is a via which, unlike conventional damascene process formed vias, will not induce the formation of voids and/or seams in the material subsequently deposited therein.