Method for fabricating ceramic chip packages
AssigneeSamsung Electro-Mechanics Co., Ltd.
InventorsJoon Il Kim, Chul Ho Kim, Ik Seo Choi
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AssigneeSamsung Electro-Mechanics Co., Ltd.
InventorsJoon Il Kim, Chul Ho Kim, Ik Seo Choi
Estimating the term…
Disclosed is a method for fabricating ceramic chip packages in which an epoxy resin containing fine ceramic particles is applied on a ceramic substrate provided with chip packages respectively having a plurality of chips mounted thereon, thereby improving reliability and endurance of the package and miniaturizing the size of the package. The epoxy resin is applied on the ceramic substrate provided with a plurality of the chips mounted thereon except a designated region, thereby minimizing the deformation of the substrate. The epoxy resin layer is formed on the substrate by two steps including a first step for forming a first epoxy resin layer serving as a dam and a second step for forming a second epoxy resin layer, thereby reducing the amount of the used epoxy resin and improving reliability and endurance of the package against temperature and humidity.
A method for fabricating ceramic chip packages comprising the steps of:
A method for fabricating ceramic chip packages comprising the steps of:
Dependencies are inferred from the claim text.
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The semiconductor body being completely enclosed: by a substrate and the encapsulations
Fillings: solid or gel fillings
Generic packages, interconnections, connectors or other constructional details of devices covered by
Term end not estimated
1. Field of the Invention
The present invention relates to a method for fabricating ceramic chip packages, and more particularly to a method for fabricating ceramic chip packages in which an epoxy resin containing fine ceramic particles is applied on a ceramic substrate provided with a plurality of chips mounted thereon, thereby protecting the chips mounted on the substrate from external stresses and improving reliability and endurance of the fabricated ceramic chip packages.
2. Description of the Related Art
The above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a cross-sectional view illustrating a process for fabricating a conventional ceramic chip package;
FIGS. 2a to 2c are perspective and cross-sectional views illustrating a process for fabricating ceramic chip packages in accordance with an embodiment of the present invention;
Now, preferred embodiments of the present invention will be described in detail with reference to the annexed drawings.
FIGS. 2a, 2b, and 2c are perspective and cross-sectional views illustrating a process for fabricating ceramic chip packages in accordance with an embodiment of the present invention.
With reference to FIG. 2a, a bar-shaped ceramic substrate 21 is prepared and a plurality of chips 23a, 23b, 23c, and 23d are mounted on the ceramic substrate 21. Although four chips are shown in the FIG. 2a, the present invention is not limited to the number of the chips mounted on the ceramic substrate 21. The aforementioned plural chips 23a, 23b, 23c, and 23d are packaged as a single chip package 22a. Although four chip packages 22a, 22b, 22c, and 22d are shown in FIG. 2a, the present invention is not limited to the number of the chip packages mounted on the ceramic substrate 21. Therefore, as shown in FIG. 2a, the bar-shaped ceramic substrate 21 comprising plural chips 23 packaged as plural packages 22 is prepared. Then, an epoxy resin layer 24 is formed on the ceramic substrate 21 so as to at least cover plural chips 23. Preferably, the epoxy resin layer 24 contains fine SiO2 particles. Since the thermal expansion coefficient of SiO2 is low, an epoxy resin applied on the ceramic substrate 21 minimizes the deformation of the ceramic substrate 21. Further, the fine SiO2 particles fill gaps between the chips 23 and the ceramic substrate 21 as well as gaps between the chips 23. The epoxy resin layer 24 is formed on the ceramic substrate 21 so that the thickness of the epoxy resin layer 24 is uniform over it entire area and the upper surface of the epoxy resin layer 24 is planar. Herein, the thickness of the epoxy resin layer 24 is preferably 200˜350 μm.