Method of manufacturing electronic device
AssigneeKabushiki Kaisha Toshiba
InventorsIkuo Uematsu, Naoya Hayamizu
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AssigneeKabushiki Kaisha Toshiba
InventorsIkuo Uematsu, Naoya Hayamizu
Estimating the term…
A method of manufacturing an electronic device comprises forming a wiring material layer made of aluminum or an aluminum alloy on the surface of an insulating film on a substrate, patterning the wiring material layer by a reactive ion etching treatment with a resist pattern used as a mask so as to form a wiring, and treating the surface of the insulating film including the wiring with an aqueous solution for removing the etching residue, the aqueous solution containing a peroxosulfate, a fluorine-containing compound and an acid for adjusting the pH value and having a pH value of −1 to 3.
A method of manufacturing an electronic device, comprising:
A method of manufacturing an electronic device, comprising:
A method of manufacturing an electronic device, comprising:
Dependencies are inferred from the claim text.
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During, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers: the processing being a delineation of…
Characterised by the gate electrodes: of lateral top-gate TFTs comprising only a single gate
Of thin-film transistors [TFT]: comprising silicon, e.g. amorphous silicon or polysilicon
Characterised by the electrode materials: conductor-insulator-semiconductor electrodes
Term end not estimated
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-87050, filed Mar. 26, 2002, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a method of manufacturing an electronic device, particularly, to a method of manufacturing an electronic device in which the process step after the reactive ion etching (RIE) treatment is improved in the manufacture of a semiconductor device or a liquid crystal display device.
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the present invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the present invention.
FIGS. 1A to 1C are cross sectional views collectively showing a process of manufacturing a semiconductor device in Example 1 of the present invention;
FIG. 2 is an oblique view showing an Al—Cu alloy wiring after removal by peeling of a resist pattern in the manufacturing process of a semiconductor device in Example 1 of the present invention;
The present invention will now be described in detail.
<First Embodiment>
(First Step)