Method of forming high aspect ratio apertures

#1. Field of the Invention

#The present invention relates to a method of forming apertures in a dielectric layer overlying a substrate of semiconductor material and, more specifically, to a method of forming high aspect ratio contact apertures through doped silicon dioxide using an inductively coupled etcher.

#2. State of the Art

#FIG. 1 comprises a schematic of the Applied Materials, Inc. Dielectric Etch IPS Centura® system, suitable for use with the process of the present invention and together therewith comprising an inventive etch system;

#FIG. 2 comprises a side sectional elevation of a masked, non-organic dielectric layer over a silicon substrate with a contact aperture being formed therein and over-etched into substrate silicon;

#FIG. 3 is a graphical representation of contact diameter versus etch depth over the time span of the contact etch for a first embodiment of the present invention;

#The present invention provides a process suitable for use with the IPS system for etching doped silicon dioxide in the form of BPSG employing a relatively simple, two-component, CO-devoid gas mixture delivered at low flow volumes and at relatively low process temperatures which avoids the risk of Ni contamination of the system chamber and, consequently, the wafers processed therein. Moreover, the low temperatures permit the use of an etch gas mixture which substantially holds top CD, does not etch stop, and etches the nitride and anti-reflective films present in some circuit structures.

#As noted previously, the inventive process employs two primary etchant gases: CHF3 and CH2F2, both delivered at extremely low flows, preferably on the order of between about 10 and 40 sccm of CHF3 and between about 10 and 40 sccm of CH2F2. The most preferable flow rates are currently believed to be on the order of about 25 sccm of CHF3 and between about 20 and 25 sccm of CH2F2. Quantities, on the order of 10 sccm or less, of other gases such as C2HF5 and CF4 may be added to modify the etch profile and increase etch rate or resist selectivity. It is believed that larger flow rates of gases such as C2HF5 or higher carbon-number gases (such as C3F6 (perfluoropropylene), C3F8 (perfluoropropane), C4F8 (perfluorobutene)) may cause the inventive process to fail due to increased taper or possibly etch stop if the flow rates are too high. Additionally, gas additives such as CF4 and C2F6 at too high of flow rates are also expected to cause the inventive process to fail for excess CD loss and possible re-entrant profiles in the aperture or contact. A variant of the inventive process (described in more detail below) employing only CHF3 in a second portion or phase thereof has been found to be useful in providing a “punch” or dimple at the contact bottom extending into the pristine substrate silicon under the oxide and other material overlayers.

#In a first embodiment of the present invention, referring to FIG. 1, the IPS system chamber temperature is defined and controlled at the roof 14 over the wafer 100 and the ring 18 surrounding the wafer 100, the roof 14 being held at a temperature within a range of between about 115° C. and 150° C. and most preferably at about 140° C., and the ring 18 within a range of between about 200° C. and 250° C., and most preferably at about 200° C. The temperature of the chuck supporting the wafer is maintained between about −10° C. and +30° C., and most preferably about −10° C.