Wiring structure for an integrated circuit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsAkihiko Ohsaki, Masahiko Fujisawa, Noboru Morimoto
Life of this patent
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsAkihiko Ohsaki, Masahiko Fujisawa, Noboru Morimoto
Estimating the term…
A wire width and a wiring space of each of signal wires 1 and ground/power wires 2 are determined to be a wire width W1 (the minimum wire width) and a wiring space S1, respectively. A wire width and a wiring space of the via-hole neighboring region 1a or 2a are determined to be a wire width W2 (>W1) and a wiring space S2 (<S1), respectively. The wire widths W1 and W2 and the wiring spaces S1 and S2 are respectively determined so as to maintain the minimum wiring pitch P. The wiring space S1 is determined also so as to satisfy {S1/P≧0.6}. Further, the signal wires 1 and the ground/power wires 2 have the same wire thickness of a wire thickness T1 which allows an aspect ratio (T1/W1) to be equal to, or higher than, 2.
An integrated circuit having a wiring structure including a plurality of signal wires and a plurality of ground/power wires which maintain a predetermined minimum wiring pitch, wherein
Dependencies are inferred from the claim text.