Semiconductor device and method of manufacturing the same
AssigneeRenesas Technology Corp.
InventorsHiroshi Moriya, Tomio Iwasaki, Hideo Miura, Shinji Nishihara, Masashi Sahara
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AssigneeRenesas Technology Corp.
InventorsHiroshi Moriya, Tomio Iwasaki, Hideo Miura, Shinji Nishihara, Masashi Sahara
Estimating the term…
There is provided a semiconductor device having a wiring structure which reduces possibility of a short circuit, and method of making the device. Besides, there is provided a semiconductor device having high reliability. Further, there is provided a semiconductor device having high yield. A wiring line is formed at one main surface side of a semiconductor substrate, and has a laminate structure of an adjacent conductor layer and a main wiring layer. The main wiring layer contains an added element to prevent migration. The adjacent conductor layer is formed of a material for preventing a main constituent element and the added element of the main wiring layer from diffusing into the substrate beneath the adjacent conductor layer, and the concentration of the added element at a location close to an interface between the adjacent conductor layer and the main wiring layer is low compared to the concentration of the added element in the main wiring layer spaced from the adjacent conductor layer.
A method of making a semiconductor device, comprising:
A method of making a semiconductor device, comprising:
Dependencies are inferred from the claim text.