Phase-interpolator based PLL frequency synthesizer

A method of frequency tuning a frequency synthesizer having a phase lock loop including a phase detector, a voltage controlled oscillator (“VCO”), and a feedback path between an output of the VCO and the phase detector, comprising the steps of:

• receiving an input reference signal having a reference phase and frequency;
• generating a VCO output signal based on the input reference signal;
• feeding the VCO output signal through the feedback path to the phase detector;
• and
• phase rotating the VCO output signal in the feedback path at a constant rate to perform fine frequency tuning the VCO output signal.

A frequency synthesizer, comprising:

• a phase detector;
• a charge pump coupled to an output of said phase detector;
• a low pass filter coupled to an output of said charge pump;
• a voltage controlled oscillator (“VCO”) coupled to an output of said low pass filter;
• and
• a feedback path coupled between an output of said VCO and said phase detector, wherein said feedback path includes
• a phase rotator that fine tunes an output frequency of said VCO output responsive to a frequency of an input clock, and
• a frequency divider that coarse tunes said output frequency of said VCO by adjusting a divider ratio of said frequency divider.