Fabrication method of semiconductor integrated circuit device

A fabrication method of a semiconductor integrated circuit device, comprising:

• (a) preparing a first mask having a plurality of opening patterns, for transferring hole patterns of said semiconductor integrated circuit device, formed in a halftone film which has, over a first main surface of a mask substrate, a first region for transferring hole patterns in the formation region of a logic circuit of said semiconductor integrated circuit device, has therearound a second region for transferring hole patterns in the formation region of a peripheral circuit of said logic circuit, and has at the periphery thereof a third region not contributing to pattern transfer of said semiconductor integrated circuit device, is deposited over the first main surface of said mask substrate and has a function of reversing the phase of a transmitted light;
• (b) preparing over said first mask a second mask which is made of a resist film capable of blocking an exposure light and has a resist pattern formed to expose desired opening patterns, among said plurality of opening patterns of said first mask, and to expose a part of said halftone film around said desired opening patterns and to cover the other opening patterns;
• and
• (c) transferring desired hole patterns onto a photoresist film over a wafer by reduction projection exposure treatment with said second mask.

A fabrication method of a semiconductor integrated circuit device having, on a semiconductor chip, a formation region of a logic circuit and a formation region of a peripheral circuit thereof, the formation region of said logic circuit having therein a first logic circuit region in which a change in logic is carried out and a second logic circuit region having a predetermined arrangement constitution of circuit patterns, comprising:

• (a) preparing a first mask having a plurality of opening patterns, for transferring hole patterns of said semiconductor integrated circuit device, in a halftone film which has, over a first main surface of a mask substrate, a first region for transferring patterns in the formation region of said logic circuit, has therearound a second region for transferring patterns in the formation region of said peripheral circuit, has at the periphery thereof a third region not contributing to pattern transfer of said semiconductor integrated circuit device, and has within said first region a fourth region for transferring patterns of the region of said second logic circuit, is deposited over the first main surface of said mask substrate and has a function of reversing the phase of a transmitted light;
• (b) preparing a second mask having, in said first region of said first mask, a resist pattern which is made of a resist film capable of blocking an exposure light and is formed to expose desired opening patterns, among said plurality of opening patterns, and to expose a part of said halftone film around said desired opening patterns and to cover the other opening patterns and having no resist pattern formed in said second, third and fourth regions;
• and
• (c) transferring desired patterns onto a photoresist film over a wafer by reduction projection exposure treatment with said second mask.

A fabrication method of a semiconductor integrated circuit device, comprising:

• (a) preparing a first mask having a plurality of opening patterns made in a light shielding film formed over a mask substrate;
• (b) preparing over said first mask a second mask which is made of a resist film capable of blocking an exposure light and has patterns formed in such a way to expose desired opening patterns, among the plurality of opening patterns of said first mask, and to cover the other opening patterns;
• and
• (c) transferring desired patterns to a photoresist film over a wafer by reduction projection exposure treatment with said second mask.