Chemical/mechanical polishing slurry, and chemical mechanical polishing process and shallow trench isolation process employing the same

A chemical mechanical polishing method comprising:

• contacting a surface of a semiconductor wafer with a surface of a polishing pad;
• supplying an aqueous solution containing abrasive particles and different first and second passivation agents to an interface between the surface of the polishing pad and the surface of the semiconductor wafer;
• and,
• rotating the surface of the semiconductor wafer relative to the surface of the polishing pad.

A chemical mechanical polishing method comprising:

• contacting a surface of a semiconductor wafer with a surface of a polishing pad;
• supplying an aqueous solution containing abrasive particles, poly-vinyl sulfonic acid, and potassium hydrogen phthalate to an interface between the surface of the polishing pad and the surface of the semiconductor wafer;
• and,
• rotating the surface of the semiconductor wafer relative to the surface of the polishing pad.

A shallow trench isolation method, comprising:

• forming a pad oxide layer over a surface of a semiconductor substrate;
• forming a silicon nitride layer over the pad oxide layer such that the pad oxide layer is interposed between the semiconductor substrate and the silicon nitride layer;
• forming a plurality of trenches through the silicon nitride layer and the pad oxide layer and into the semiconductor substrate;
• forming an insulating oxide layer within the plurality of trenches and over the silicon nitride layer;
• subjecting the insulating oxide layer to chemical/mechanical polishing so as to remove the insulating oxide layer down to a level of silicon nitride layer, wherein the chemical/mechanical polishing includes (a) contacting a surface of the insulating oxide layer with a surface of a polishing pad, (b) supplying an aqueous solution containing abrasive particles and different first and second passivation agents to an interface between the surface of the polishing pad and the surface of the insulating oxide layer, and (c) rotating the surface of the semiconductor wafer relative to the surface of the polishing pad;
• and
• removing the pad oxide layer and the silicon nitride layer.

A shallow trench isolation method, comprising:

• forming a pad oxide layer over a surface of a semiconductor substrate;
• forming a silicon nitride layer over the pad oxide layer such that the pad oxide layer is interposed between the semiconductor substrate and the silicon nitride layer;
• forming a plurality of trenches through the silicon nitride layer and the pad oxide layer and into the semiconductor substrate;
• forming an insulating oxide layer within the plurality of trenches and over the silicon nitride layer;
• subjecting the insulating oxide layer to chemical/mechanical polishing so as to remove the insulating oxide layer down to a level of silicon nitride layer, wherein the chemical/mechanical polishing includes (a) contacting a surface of the insulating oxide layer with a surface of a polishing pad, (b) supplying an aqueous solution containing abrasive particles, poly-vinyl sulfonic acid, and potassium hydrogen phthalate to an interface between the surface of the polishing pad and the surface of the insulating oxide layer, and (c) rotating the surface of the semiconductor wafer relative to the surface of the polishing pad;
• and
• removing the pad oxide layer and the silicon nitride layer.