High mobility transistors in soi and method for forming
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Xavier Baie, Randy W. Mann, Edward J. Nowak, Jed H. Rankin
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Abstract
The present invention provides a device design and method for forming Field Effect Transistors (FETs) that have improved performance without negative impacts to device density. The present invention forms high-gain p-channel transistors by forming them on silicon islands where hole mobility has been increased. The hole mobility is increased by applying physical straining to the silicon islands. By straining the silicon islands, the hole mobility is increased resulting in increased device gain. This is accomplished without requiring an increase in the size of the devices, or the size of the contacts to the devices.
Claims24
1 A method of forming a semiconductor substrate, the method comprising the steps of:
- providing a semiconductor wafer, the semiconductor wafer having an SOI layer and a buried insulator layer;
- patterning the semiconductor wafer to define at least a first SOI island and a second SOI island, the patterning forming a trench between first SOI island and the second SOI island;
- straining the first and second SOI islands;
- and
- forming a conductive bridge in the trench.
2 The method of claim 1 further comprising the steps of:
- forming a first gate structure on the first SOI island, and a second gate structure on the second SOI island;
- and
- forming a source/drain implant between the first gate structure and the second gate structure, wherein the source/drain implant is formed extending across the conductive bridge between the first SOI island and the second SOI island.
3 The method of claim 1 the step of straining the first and second SOI islands comprises forming silicon dioxide at a bottom edge of the first and second SOI islands.
4 The method of claim 1 wherein the step of forming a conductive bridge in the trench comprises depositing polysilicon in the trench.
5 The method of claim 1 further comprising the step of forming an insulative layer at a bottom of the trench.
6 The method of claim 1 further comprising forming a conductive top layer of the conductive bridge.
7 The method of claim 6 wherein the step of forming a conductive top layer comprising depositing a metal on the conductive bridge and adjacent portions of the first and second SOI islands, and reacting the metal to form silicide.
8 The method of claim 1, further comprising forming an implant thatextends at least partially into said conductive bridge.
9 The method of claim 8 wherein the step of patterning the semiconductor wafer to define at least a first SOI island and a second SOI island further defines a third SOI island and forms a second trench between the first SOI island and the third SOI island, and further comprising the steps of:
- straining the third SOI island;
- forming a second conductive bridge in the second trench;
- and
- forming a second implant that extends at least partially into the second conductive bridge.
10 A semiconductor structure comprising:
- an island of strained semiconductor material, the island having a top, sides and a bottom;
- a non-insulative material adjacent at least one of the sides of the island, the non-insulating material having a top;
- and
- a layer of conductive material overlaying a portion of the top of the island and a portion of the non-insulative material, and reacting therewith to form a conductive reaction product.
11 The semiconductor structure of claim 10 wherein the tops of the island and the non-insulative material are sufficiently co-planar that the conductive reaction product is of substantially uniform thickness.
12 The semiconductor structure of claim 10 wherein the silicon island comprises a portion of an SOI layer.
13 The semiconductor structure of claim 10 wherein the an island of strained semiconductor material is strained by the formation of silicon dioxide under a portion of the bottom of the island.
14 The semiconductor structure of claim 10 wherein the reaction product comprises silicide.
15 The semiconductor structure of claim 10 wherein the non-insulative material comprises polysilicon.
16 The semiconductor structure of claim 10 wherein the semiconductor structure further includes a field effect transistor, and wherein the field effect transistor includes a source/drain implant, wherein the source/drain implant is at least partially formed in the non-insulative material.
17 The semiconductor structure of claim 16 further comprising:
- a second island of strained semiconductor material, the second island having a top, sides and a bottom, the second island of strained semiconductor material adjacent the non-insulative material adjacent;
- and
- a second field effect transistor formed on the second island of the strained semiconductor material, the second field effect transistor sharing the source/drain implant that is at least partially formed in the non-insulative material.
18 A semiconductor structure, the semiconductor structure comprising:
- a first silicon island and a second silicon island, and a trench between the first silicon island and the second silicon island.
- a first gate structure formed on the first silicon island;
- a second gate structure formed on the second silicon island;
- a conductive bridge formed in the trench between the first silicon island and the second silicon island;
- and
- a source/drain implant formed between the first gate structure and the second gate structure, the source/drain implant extending across the conductive bridge between the first silicon island and the second silicon island.
19 The semiconductor structure of claim 18 wherein the first and second silicon islands are strained to improve carrier mobility under the first and second gate structures.
20 The semiconductor structure of claim 19 wherein the first and second silicon islands are strained by the formation of silicon dioxide at edges of the first and second silicon islands.
21 The semiconductor structure of claim 18 wherein conductive bridge comprises polysilicon.
22 The semiconductor structure of claim 18 further comprising an insulative layer formed in the bottom of the trench between the first silicon island and the second silicon island.
23 The semiconductor structure of claim 18 further comprising a conductive top layer formed at a top of the conductive bridge.
24 The semiconductor structure of claim 23 wherein the conductive top layer comprises silicide.