Insulated gate semiconductor device and method of manufacturing the same
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsYouichi Ishimura, Yoshifumi Tomomatsu
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Abstract
In an insulated gate semiconductor device having first, second and third gate electrodes (10) which are buried in first, second, and third trenches (7), an emitter electrode (11) is commonly connected to a base region (4), an emitter region (5) and the second gate electrode (10b), and the third gate electrode (10c) is connected to only the first gate electrode (10a). An insulating interlayer (9) interposed between the emitter electrode (11) and the gate electrodes (10) has a pattern configuration such that the second gate electrode is partially connected to the emitter electrode, to thereby control a gate capacity and suppress a short-circuit current caused by a crack.
Claims16
An insulated gate semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- a collector region of a second conductivity type formed on a lower major surface of said semiconductor substrate;
- a collector electrode connected to said collector region;
- a base region of the second conductivity type selectively formed on an upper major surface of said semiconductor substrate;
- an emitter region of the first conductivity type selectively formed in said base region;
- a plurality of trenches including first, second, and third trenches selectively formed in said base region, each of said trenches having a depth passing through said base region and reaching the semiconductor substrate;
- first, second, and third gate electrodes buried in said first, second, and third trenches through insulating films, respectively;
- and
- an emitter electrode to which said base region, emitter region, and second gate electrode are commonly connected,
- wherein said third gate electrode is connected to only said first gate electrode, and said emitter electrode is partially connected to said second gate electrode.
A method of manufacturing an insulated gate semiconductor device comprising the steps of:
- forming a collector region of a second conductivity type on a lower major surface of a semiconductor substrate of a first conductivity type;
- forming a collector electrode connected to a lower major surface of said collector region;
- selectively forming a base region of the second conductivity type on an upper major surface of said semiconductor substrate;
- selectively forming an emitter region of the first conductivity type in said base region;
- selectively forming a plurality of trenches including first, second, and third trenches in said base region, each of the trenches having a depth passing through said base region and reaching the semiconductor substrate;
- burying first, second, and third gate electrodes in the first, second, and third trenches through insulating films, respectively;
- and
- forming an emitter electrode to which upper surface portions of said base region, emitter region and second gate electrode are commonly connected,
- wherein said third gate electrode is connected to only said first gate electrode, and said second gate electrode is partially connected to said emitter electrode.
Dependencies are inferred from the claim text.