System for multiple input floating gate structures

A MOS transistor, having a dynamically adjustable threshold voltage value, comprising:

• a first input formed in a first active device region;
• a second input formed in a second active device region;
• a floating gate disposed upon the first and second inputs and separated therefrom by a gate oxide;
• and
• a device body, formed in a third active device region and coupled to the first and second inputs through the floating gate.

A method of producing a semiconductor device having a dynamically adjustable threshold voltage value, comprising the steps of:

• forming a first input in a first active device region;
• forming a second input in a second active device region;
• disposing a floating gate upon the first and second inputs with a dielectric layer interposed therebetween;
• and
• forming a device body in a third active device region, coupled to the first and second inputs through the floating gate.

A method of producing a multiple input floating gate device in a single-poly MOS process, comprising the steps of:

• providing a substrate upon which the device is to be fabricated;
• performing n-well or p-well implant on the substrate;
• utilizing a LOCOS or STI formation for device isolation;
• optionally performing a high-dose multiple input moat implant;
• performing threshold implant;
• performing gate oxidation;
• performing poly gate deposition;
• and
• performing source/drain implantation.