Method for manufacturing metal line contact plug of semiconductor device
AssigneeHynix Semiconductor Inc.
InventorsJong Goo Jung, Ki Cheol Ahn, Pan Ki Kwon
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Abstract
A method for manufacturing of a metal line contact plug of a semiconductor device by performing a two step CMP process using (1) a first slurry solution having high etching selectivity of metal/insulating film and (2) a second slurry solution having small etching selectivity of metal/insulating film, thereby minimizing dependency on CMP devices and separating easily a metal line contact plug.
Claims20
A method for manufacturing a metal line contact plug of a semiconductor device by a Chemical Mechanical Polishing (CMP) process, the method comprising:
- (a) performing a first CMP process using a first slurry solution, the first slurry solution comprising 1 to 20 wt % of abrasive, 0.1 to 15 wt % of oxidizer and 0.01 to 10 wt % of complexing agent based on the total weight of the first slurry solution respectively, and having an etching selectivity of more than 10 for a metal/insulating film and a pH ranging from 2 to 9;
- and
- (b) performing a second CMP process using a second slurry solution, the second slurry solution comprising 5 to 30 wt % of abrasive and 0.01 to 5 wt % of oxidizer based on the total weight of the second slurry solution respectively, and having an etching selectivity of less than 3 in the metal/insulating film and a pH ranging from 6 to 12.
A method for manufacturing a metal line contact plug of a semiconductor device, the method comprising:
- forming a stack pattern of a bit line and a mask insulating film on a semiconductor substrate;
- forming an interlayer insulating film on the entire surface of the resultant structure;
- forming a metal line contact hole by defining the metal line contact hole region and selectively etching the interlayer insulating film to expose the semiconductor substrate and the stack patterns present in the contact hole region;
- forming oxide film spacers on sidewalls of the metal line contact hole and stack patterns in the metal line contact hole;
- depositing a metal layer in the metal line contact hole and on remaining portions of the interlayer insulating film;
- and
- performing a two step of CMP process onto the entire surface of the resultant structure until exposing the mask insulating film of the stack pattern to form a metal line contact plug contact to the semiconductor substrate, wherein the CMP process comprises:
- (a) performing a first CMP process using a first slurry solution having an etching selectivity of more than 10 for metal/insulating film and a pH ranging from 2 to 9;
- and
- (b) performing a second CMP process using a second slurry solution having an etching selectivity of less than 3 for metal/insulating film and a pH ranging from 6 to 12,
- wherein the first slurry solution comprises 1 to 20 wt % of abrasive, 0.1 to 15 wt % of oxidizer and 0.001 to 10 wt % of complexing agent based on the total weight of the first slurry solution, and
- wherein the second slurry solution comprises 5 to 30 wt % of abrasive and 0.01 to 5 wt % of oxidizer based on the total weight of the second slurry solution.
Dependencies are inferred from the claim text.