Method of fabricating an IMD layer to improve global planarization in subsequent CMP
OwnerChen-Chiu Hsue, Shyh-Dar Leeinventors
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Abstract
A method of fabricating an IMD layer is provided on a semiconductor substrate, on which at least two adjacent metal wiring lines separated by a gap are patterned. A first dielectric layer, preferably of silicon oxide, is formed on the metal wiring lines to partially fill the gap below the level of the top of the metal wiring lines using high density plasma chemical vapor deposition (HDPCVD). Then, a second dielectric layer, preferably of silicon oxide, is formed on the first dielectric layer to completely fill the gap to a predetermined thickness using PECVD. Thus, the first dielectric layer and the second dielectric layer between the two adjacent metal wiring lines serve as the IMD layer.
Claims10
A method of fabricating an inter-metal dielectric (IMD) layer, comprising steps of:
- providing a semiconductor substrate having at least two adjacent metal wiring lines separated by a gap;
- forming a first dielectric layer on the metal wiring lines to partially fill the gap below the level of the top of the metal wiring lines using high density plasma chemical vapor deposition (HDPCVD);
- and
- forming a second dielectric layer on the first dielectric layer to a predetermined thickness,
- wherein the first dielectric layer and the second dielectric layer between the two adjacent metal wiring lines serve as the IMD layer.
Dependencies are inferred from the claim text.